Equal stride super-buffer Rx mode allows to mark packets in HW
using filters. Process the data on datapath and advertise
corresponding features to allow flow API support to implement it.

Signed-off-by: Andrew Rybchenko <arybche...@solarflare.com>
---
 drivers/net/sfc/sfc_dp_rx.h        |  2 ++
 drivers/net/sfc/sfc_ef10_essb_rx.c | 14 ++++++++++++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/sfc_dp_rx.h b/drivers/net/sfc/sfc_dp_rx.h
index cb745e6..83faad1 100644
--- a/drivers/net/sfc/sfc_dp_rx.h
+++ b/drivers/net/sfc/sfc_dp_rx.h
@@ -193,6 +193,8 @@ struct sfc_dp_rx {
 #define SFC_DP_RX_FEAT_SCATTER                 0x1
 #define SFC_DP_RX_FEAT_MULTI_PROCESS           0x2
 #define SFC_DP_RX_FEAT_TUNNELS                 0x4
+#define SFC_DP_RX_FEAT_FLOW_FLAG               0x8
+#define SFC_DP_RX_FEAT_FLOW_MARK               0x10
        sfc_dp_rx_get_dev_info_t                *get_dev_info;
        sfc_dp_rx_pool_ops_supported_t          *pool_ops_supported;
        sfc_dp_rx_qsize_up_rings_t              *qsize_up_rings;
diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c 
b/drivers/net/sfc/sfc_ef10_essb_rx.c
index 8dd4396..f051f3c 100644
--- a/drivers/net/sfc/sfc_ef10_essb_rx.c
+++ b/drivers/net/sfc/sfc_ef10_essb_rx.c
@@ -316,12 +316,21 @@ sfc_ef10_essb_rx_get_pending(struct sfc_ef10_essb_rxq 
*rxq,
                        m->ol_flags |=
                                (PKT_RX_RSS_HASH *
                                 !!EFX_TEST_QWORD_BIT(*qwordp,
-                                       ES_EZ_ESSB_RX_PREFIX_HASH_VALID_LBN));
+                                       ES_EZ_ESSB_RX_PREFIX_HASH_VALID_LBN)) |
+                               (PKT_RX_FDIR_ID *
+                                !!EFX_TEST_QWORD_BIT(*qwordp,
+                                       ES_EZ_ESSB_RX_PREFIX_MARK_VALID_LBN)) |
+                               (PKT_RX_FDIR *
+                                !!EFX_TEST_QWORD_BIT(*qwordp,
+                                       ES_EZ_ESSB_RX_PREFIX_MATCH_FLAG_LBN));
 
                        /* EFX_QWORD_FIELD converts little-endian to CPU */
                        m->hash.rss =
                                EFX_QWORD_FIELD(*qwordp,
                                                ES_EZ_ESSB_RX_PREFIX_HASH);
+                       m->hash.fdir.hi =
+                               EFX_QWORD_FIELD(*qwordp,
+                                               ES_EZ_ESSB_RX_PREFIX_MARK);
 
                        m = sfc_ef10_essb_next_mbuf(rxq, m);
                } while (todo_bufs-- > 0);
@@ -640,7 +649,8 @@ struct sfc_dp_rx sfc_ef10_essb_rx = {
                .hw_fw_caps     = SFC_DP_HW_FW_CAP_EF10 |
                                  SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER,
        },
-       .features               = 0,
+       .features               = SFC_DP_RX_FEAT_FLOW_FLAG |
+                                 SFC_DP_RX_FEAT_FLOW_MARK,
        .get_dev_info           = sfc_ef10_essb_rx_get_dev_info,
        .pool_ops_supported     = sfc_ef10_essb_rx_pool_ops_supported,
        .qsize_up_rings         = sfc_ef10_essb_rx_qsize_up_rings,
-- 
2.7.4

Reply via email to