> -----Original Message----- > From: Tan, Jianfeng > Sent: Friday, January 12, 2018 11:01 AM > To: 'Maxime Coquelin' <[email protected]>; [email protected]; > [email protected]; [email protected]; Burakov, Anatoly > <[email protected]>; [email protected]; > [email protected] > Cc: [email protected]; Zhang, Qi Z <[email protected]> > Subject: RE: [PATCH v2] bus/pci: forbid VA as IOVA mode if IOMMU address > width too small > > > > > -----Original Message----- > > From: Maxime Coquelin [mailto:[email protected]] > > Sent: Tuesday, January 9, 2018 9:18 PM > > To: [email protected]; [email protected]; Tan, Jianfeng; > > [email protected]; Burakov, Anatoly; > > [email protected]; [email protected] > > Cc: [email protected]; Maxime Coquelin > > Subject: [PATCH v2] bus/pci: forbid VA as IOVA mode if IOMMU address > > width too small > > > > Intel VT-d supports different address widths for the IOVAs, from > > 39 bits to 56 bits. > > > > While recent processors support at least 48 bits, VT-d emulation > > currently only supports 39 bits. It makes DMA mapping to fail in this > > case when using VA as IOVA mode, as user-space virtual addresses uses > > up to 47 bits (see kernel's Documentation/x86/x86_64/mm.txt). > > > > This patch parses VT-d CAP register value available in sysfs, and > > forbid VA as IOVA mode if the GAW is 39 bits or unknown. > > > > Fixes: f37dfab21c98 ("drivers/net: enable IOVA mode for Intel PMDs") > > > > Cc: [email protected] > > Signed-off-by: Maxime Coquelin <[email protected]> > > I don't have strong objection on this patch. Plus, this patch has been > verified > with --no-huge, and Intel low-end processors (with the help of Zhang Qi).
Sorry, my bad, I just found it is tested with igb_uio. re-tested it with vfio, seems VA width is no decoded correctly I have sagaw = 4, which means 48b VA address, but the real device is 39, so IOVA is not disabled, still see that failure. Thanks Qi > > Tested-by: Jianfeng Tan <[email protected]> > > > --- > > > > Changes in v2: > > ============== > > - Rework pci_one_device_iommu_support_va #ifdefery (Stephen) > > - Don't inline introduced functions (Stephen) > > > > drivers/bus/pci/linux/pci.c | 108 > > ++++++++++++++++++++++++++++++++++++++++---- > > 1 file changed, 99 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c > > index 25f907e04..0a43c4b89 100644 > > --- a/drivers/bus/pci/linux/pci.c > > +++ b/drivers/bus/pci/linux/pci.c > > @@ -547,6 +547,100 @@ pci_one_device_has_iova_va(void) > > return 0; > > } > > > > +#if defined(RTE_ARCH_X86) > > +static bool > > +pci_one_device_iommu_support_va(struct rte_pci_device *dev) { > > +#define VTD_CAP_SAGAW_SHIFT 8 > > +#define VTD_CAP_SAGAW_MASK (0x1fULL << > > VTD_CAP_SAGAW_SHIFT) > > +#define X86_VA_WIDTH 47 /* From Documentation/x86/x86_64/mm.txt > */ > > + struct rte_pci_addr *addr = &dev->addr; > > + char filename[PATH_MAX]; > > + FILE *fp; > > + uint64_t sagaw, vtd_cap_reg = 0; > > + int guest_addr_width = 0; > > + > > + snprintf(filename, sizeof(filename), > > + "%s/" PCI_PRI_FMT "/iommu/intel-iommu/cap", > > + rte_pci_get_sysfs_path(), addr->domain, addr->bus, addr- > > >devid, > > + addr->function); > > + if (access(filename, F_OK) == -1) { > > + /* We don't have an Intel IOMMU, assume VA supported*/ > > A nitpick: missed a space between "supported" and "*/" > > Thanks, > Jianfeng
