-----Original Message-----
> Date: Tue, 26 Dec 2017 20:28:23 -0800
> From: Yongseok Koh <ys...@mellanox.com>
> To: adrien.mazarg...@6wind.com, nelio.laranje...@6wind.com,
> jerin.ja...@caviumnetworks.com, jianbo....@arm.com
> CC: dev@dpdk.org, Yongseok Koh <ys...@mellanox.com>, Thomas Speier
> <tspe...@qti.qualcomm.com>
> Subject: [PATCH 1/2] eal/arm64: modify I/O device memory barriers
> X-Mailer: git-send-email 2.11.0
>
> Instead of using system-wide 'dsb' instruction for IO barriers, 'dmb' is
> sufficient and could bring better performance. Using 'dmb' with Outer
> Shareable Domain option is also consistent with linux kernel.
>
> Cc: Thomas Speier <tspe...@qti.qualcomm.com>
>
> Signed-off-by: Yongseok Koh <ys...@mellanox.com>
> Acked-by: Thomas Speier <tspe...@qti.qualcomm.com>
> Acked-by: Shahaf Shuler <shah...@mellanox.com>
Acked-by: Jerin Jacob <jerin.ja...@caviumnetworks.com>
> ---
> lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> index 0b70d6209..8dcce6054 100644
> --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> @@ -58,11 +58,11 @@ extern "C" {
>
> #define rte_smp_rmb() dmb(ishld)
>
> -#define rte_io_mb() rte_mb()
> +#define rte_io_mb() dmb(osh)
>
> -#define rte_io_wmb() rte_wmb()
> +#define rte_io_wmb() dmb(oshst)
>
> -#define rte_io_rmb() rte_rmb()
> +#define rte_io_rmb() dmb(oshld)
>
> #ifdef __cplusplus
> }
> --
> 2.11.0
>
