Hello Gaetan,

On Thursday 12 October 2017 01:51 PM, Gaetan Rivet wrote:
These actions have been enacted.

Signed-off-by: Gaetan Rivet <gaetan.ri...@6wind.com>
---
  doc/guides/rel_notes/deprecation.rst | 13 -------------
  1 file changed, 13 deletions(-)

diff --git a/doc/guides/rel_notes/deprecation.rst 
b/doc/guides/rel_notes/deprecation.rst
index ef2264f..23faa19 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -16,19 +16,6 @@ Deprecation Notices
    - ``rte_set_log_type``, replaced by ``rte_log_set_level``
    - ``rte_get_log_type``, replaced by ``rte_log_get_level``
-* eal: several API and ABI changes are planned for ``rte_devargs`` in v17.11.
-  The format of device command line parameters will change. The bus will need
-  to be explicitly stated in the device declaration. The enum ``rte_devtype``
-  was used to identify a bus and will disappear.
-  The structure ``rte_devargs`` will change.
-  The ``rte_devargs_list`` will be made private.
-  The following functions are deprecated starting from 17.08 and will either be
-  modified or removed in 17.11:
-
-  - ``rte_eal_devargs_add``
-  - ``rte_eal_devargs_type_count``
-  - ``rte_eal_parse_devargs_str``, replaced by ``rte_eal_devargs_parse``
-
  * eal: An ABI change is planned for 17.11 to make DPDK aware of IOVA address
    translation scheme.
    Reference to phys address in EAL data-structure or functions may change to


Once this patch is formalized, the documentation reference for rte_devargs.h also needs to be changed as it still refers to RTE devargs as:

"...These devices can be PCI devices or virtual devices....".

Similarly, the rte_devargs_parse too has PCI traces.

Next step would be to remove the "pci"/"vdev" reference from rte_eal_dev_attach.

Former can be part of this series, but the later needs to be a separate patch, I think. Let me know if you want me to work on these (or later).

Other than that, I think I am OK with overall patch. If you can push the final series (I am not sure it would be with or without bus control), I can give it a spin (to vaildate if non-PCI like FSLMC bus can work fine).

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