[dpdk-dev] [PATCH v2 1/7] net/mlx5: cleanup memory barriers

[Yongseok Koh]

Updating a consumer index to HW doesn't require a memory barrier in case
that there's no updated data to be posted to HW, but a compiler barrier is
sufficient. rte_wmb() is replaced with rte_io_wmb() when it makes changes
visible to HW, not other core.

Signed-off-by: Yongseok Koh <ys...@mellanox.com>
Acked-by: Shahaf Shuler <shah...@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranje...@6wind.com>
---
 drivers/net/mlx5/mlx5_rxtx.c         | 4 ++--
 drivers/net/mlx5/mlx5_rxtx.h         | 2 +-
 drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 9389383f6..275cd6a4b 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -1928,9 +1928,9 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, 
uint16_t pkts_n)
                return 0;
        /* Update the consumer index. */
        rxq->rq_ci = rq_ci >> sges_n;
-       rte_wmb();
+       rte_io_wmb();
        *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
-       rte_wmb();
+       rte_io_wmb();
        *rxq->rq_db = rte_cpu_to_be_32(rxq->rq_ci);
 #ifdef MLX5_PMD_SOFT_COUNTERS
        /* Increment packets counter. */
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index a96a21ab7..827cb3c9f 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -504,7 +504,7 @@ mlx5_tx_complete(struct mlx5_txq_data *txq)
        txq->cq_ci = cq_ci;
        txq->elts_tail = elts_tail;
        /* Update the consumer index. */
-       rte_wmb();
+       rte_compiler_barrier();
        *txq->cq_db = rte_cpu_to_be_32(cq_ci);
 }
 
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c 
b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
index 6d337ecd3..e8f0626a6 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c
@@ -567,7 +567,7 @@ rxq_replenish_bulk_mbuf(struct mlx5_rxq_data *rxq, uint16_t 
n)
                wq[i].addr = rte_cpu_to_be_64((uintptr_t)elts[i]->buf_addr +
                                              RTE_PKTMBUF_HEADROOM);
        rxq->rq_ci += n;
-       rte_wmb();
+       rte_io_wmb();
        *rxq->rq_db = rte_cpu_to_be_32(rxq->rq_ci);
 }
 
@@ -1259,7 +1259,7 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf 
**pkts, uint16_t pkts_n)
                        rcvd_pkt += n;
                }
        }
-       rte_wmb();
+       rte_compiler_barrier();
        *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
        return rcvd_pkt;
 }
-- 
2.11.0