On Thu, Sep 21, 2017 at 01:49:28PM +0200, Adrien Mazarguil wrote:
> On Thu, Sep 21, 2017 at 04:32:40PM +0800, Zhiyong Yang wrote:
> > Extend port_id definition from uint8_t to uint16_t in lib and drivers
> > data structures, specifically rte_eth_dev_data. Modify the APIs,
> > drivers and app using port_id at the same time.
> >
> > Fix some checkpatch issues from the original code and remove some
> > unnecessary cast operations.
> >
> > release_17_11 and deprecation have been updated in the patch.
> >
> > Signed-off-by: Zhiyong Yang <zhiyong.y...@intel.com>
> > ---
> <snip>
> > diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
> > index 7de1d1086..238a64f43 100644
> > --- a/drivers/net/mlx5/mlx5_rxtx.h
> > +++ b/drivers/net/mlx5/mlx5_rxtx.h
> > @@ -112,14 +112,14 @@ struct rxq {
> > unsigned int sges_n:2; /* Log 2 of SGEs (max buffers per packet). */
> > unsigned int cqe_n:4; /* Log 2 of CQ elements. */
> > unsigned int elts_n:4; /* Log 2 of Mbufs. */
> > - unsigned int port_id:8;
> > unsigned int rss_hash:1; /* RSS hash result is enabled. */
> > unsigned int mark:1; /* Marked flow available on the queue. */
> > unsigned int pending_err:1; /* CQE error needs to be handled. */
> > unsigned int trim_elts:1; /* Whether elts needs clean-up. */
> > - unsigned int :6; /* Remaining bits. */
> > + unsigned int :14; /* Remaining bits. */
> > volatile uint32_t *rq_db;
> > volatile uint32_t *cq_db;
> > + uint16_t port_id;
> > uint16_t rq_ci;
> > uint16_t rq_pi;
> > uint16_t cq_ci;
> <snip>
>
> Can't speak for the other PMDs, but it looks OK as far as mlx4/mlx5 are
> affected. This is my ack for this specific change:
>
> Acked-by: Adrien Mazarguil <adrien.mazarg...@6wind.com>
>
> --
> Adrien Mazarguil
> 6WIND
Ferruh, the patch applied on master-net does not match this version of
mlx5_rxtx.h causing a performance issue.
Regards,
--
Nélio Laranjeiro
6WIND
