By default, Verbs maps the doorbell register to write combining.
Working with write combining is useful for drivers which use blue flame
for the doorbell write.
Since mlx5 PMD uses only doorbells and write combining mapping requires
an extra memory barrier to flush the doorbell after its write, setting
the mapping to un-cached by default.
Such change is expected to reduce the max and average round trip latency.
Signed-off-by: Shahaf Shuler <shah...@mellanox.com>
Signed-off-by: Yongseok Koh <ys...@mellanox.com>
Signed-off-by: Alexander Solganik <solga...@gmail.com>
Signed-off-by: Sagi Grimberg <s...@grimberg.me>
Acked-by: Nelio Laranjeiro <nelio.laranje...@6wind.com>
---
drivers/net/mlx5/mlx5.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index bd66a7c77..50f4ba70a 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -884,6 +884,8 @@ rte_mlx5_pmd_init(void)
* using this PMD, which is not supported in forked processes.
*/
setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
+ /* Don't map UAR to WC if BlueFlame is not used.*/
+ setenv("MLX5_SHUT_UP_BF", "1", 1);
ibv_fork_init();
rte_pci_register(&mlx5_driver);
}
--
2.12.0
