01/07/2017 13:14, Thomas Monjalon:
> 30/06/2017 13:36, Olivier Matz:
> > On Fri, 2 Jun 2017 13:12:13 -0700, Daniel Verkamp
> > <daniel.verk...@intel.com> wrote:
> > > rte_memzone_reserve() provides cache line alignment, but
> > > struct rte_ring may require more than cache line alignment: on x86-64,
> > > it needs 128-byte alignment due to PROD_ALIGN and CONS_ALIGN, which are
> > > 128 bytes, but cache line size is 64 bytes.
> > >
> > > Fixes runtime warnings with UBSan enabled.
> > >
> > > Fixes: d9f0d3a1ffd4 ("ring: remove split cacheline build setting")
> > >
> > > Signed-off-by: Daniel Verkamp <daniel.verk...@intel.com>
> >
> > Acked-by: Olivier Matz <olivier.m...@6wind.com>
>
> Applied, thanks
and Cc sta...@dpdk.org ;)
