On Thu, Jun 08, 2017 at 04:35:20PM +0100, Ananyev, Konstantin wrote:
>
>
> > -----Original Message-----
> > From: Richardson, Bruce
> > Sent: Thursday, June 8, 2017 4:25 PM
> > To: Ananyev, Konstantin <konstantin.anan...@intel.com>
> > Cc: Olivier Matz <olivier.m...@6wind.com>; Verkamp, Daniel
> > <daniel.verk...@intel.com>; dev@dpdk.org
> > Subject: Re: [dpdk-dev] [PATCH v2] ring: use aligned memzone allocation
> >
> > On Thu, Jun 08, 2017 at 03:50:34PM +0100, Ananyev, Konstantin wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Richardson, Bruce
> > > > Sent: Thursday, June 8, 2017 3:12 PM
> > > > To: Olivier Matz <olivier.m...@6wind.com>
> > > > Cc: Ananyev, Konstantin <konstantin.anan...@intel.com>; Verkamp, Daniel
> > > > <daniel.verk...@intel.com>; dev@dpdk.org
> > > > Subject: Re: [dpdk-dev] [PATCH v2] ring: use aligned memzone allocation
> > > >
> > > > On Thu, Jun 08, 2017 at 04:05:26PM +0200, Olivier Matz wrote:
> > > > > On Thu, 8 Jun 2017 14:20:52 +0100, Bruce Richardson
> > > > > <bruce.richard...@intel.com> wrote:
> > > > > > On Thu, Jun 08, 2017 at 02:45:40PM +0200, Olivier Matz wrote:
> > > > > > > On Tue, 6 Jun 2017 15:56:28 +0100, Bruce Richardson
> > > > > > > <bruce.richard...@intel.com> wrote:
> > > > > > > > On Tue, Jun 06, 2017 at 02:19:21PM +0100, Ananyev, Konstantin
> > > > > > > > wrote:
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > > -----Original Message-----
> > > > > > > > > > From: Richardson, Bruce
> > > > > > > > > > Sent: Tuesday, June 6, 2017 1:42 PM
> > > > > > > > > > To: Ananyev, Konstantin <konstantin.anan...@intel.com>
> > > > > > > > > > Cc: Verkamp, Daniel <daniel.verk...@intel.com>; dev@dpdk.org
> > > > > > > > > > Subject: Re: [dpdk-dev] [PATCH v2] ring: use aligned
> > > > > > > > > > memzone allocation
> > > > > > > > > >
> > > > > > > > > > On Tue, Jun 06, 2017 at 10:59:59AM +0100, Ananyev,
> > > > > > > > > > Konstantin wrote:
> > > > > > > > > > >
> > > > > > > > > > > > >
> > > > > > > > > > > > >
> > > > > > > > > > > > >
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > The PROD/CONS_ALIGN values on x86-64 are set to 2
> > > > > > > > > > > > > > cache lines, so members
> > > > > > > > > > > > > of struct rte_ring are 128 byte aligned,
> > > > > > > > > > > > > >and therefore the whole struct needs 128-byte
> > > > > > > > > > > > > >alignment according to the ABI
> > > > > > > > > > > > > so that the 128-byte alignment of the fields can be
> > > > > > > > > > > > > guaranteed.
> > > > > > > > > > > > >
> > > > > > > > > > > > > Ah ok, missed the fact that rte_ring is 128B aligned
> > > > > > > > > > > > > these days.
> > > > > > > > > > > > > BTW, I probably missed the initial discussion, but
> > > > > > > > > > > > > what was the reason for that?
> > > > > > > > > > > > > Konstantin
> > > > > > > > > > > >
> > > > > > > > > > > > I don't know why PROD_ALIGN/CONS_ALIGN use 128 byte
> > > > > > > > > > > > alignment; it seems unnecessary if the cache line is
> > > > > > > > > > > > only 64
> > bytes.
> > > > An
> > > > > > > > > > alternate
> > > > > > > > > > > > fix would be to just use cache line alignment for these
> > > > > > > > > > > > fields (since memzones are already cache line aligned).
> > > > > > > > > > >
> > > > > > > > > > > Yes, had the same thought.
> > > > > > > > > > >
> > > > > > > > > > > > Maybe there is some deeper reason for the >= 128-byte
> > > > > > > > > > > > alignment logic in rte_ring.h?
> > > > > > > > > > >
> > > > > > > > > > > Might be, would be good to hear opinion the author of
> > > > > > > > > > > that change.
> > > > > > > > > >
> > > > > > > > > > It gives improved performance for core-2-core transfer.
> > > > > > > > >
> > > > > > > > > You mean empty cache-line(s) after prod/cons, correct?
> > > > > > > > > That's ok but why we can't keep them and whole rte_ring
> > > > > > > > > aligned on cache-line boundaries?
> > > > > > > > > Something like that:
> > > > > > > > > struct rte_ring {
> > > > > > > > > ...
> > > > > > > > > struct rte_ring_headtail prod __rte_cache_aligned;
> > > > > > > > > EMPTY_CACHE_LINE __rte_cache_aligned;
> > > > > > > > > struct rte_ring_headtail cons __rte_cache_aligned;
> > > > > > > > > EMPTY_CACHE_LINE __rte_cache_aligned;
> > > > > > > > > };
> > > > > > > > >
> > > > > > > > > Konstantin
> > > > > > > >
> > > > > > > > Sure. That should probably work too.
> > > > > > > >
> > > > > > > > /Bruce
> > > > > > >
> > > > > > > I also agree with Konstantin's proposal. One question though:
> > > > > > > since it
> > > > > > > changes the alignment constraint of the rte_ring structure, I
> > > > > > > think it is
> > > > > > > an ABI breakage: a structure including the rte_ring structure
> > > > > > > inherits
> > > > > > > from this constraint.
> > > > > > >
> > > > > > > How could we handle that, knowing this is probably a rare case?
> > > > > > >
> > > > > > >
> > > > > > Is it an ABI break so long as we keep the resulting size and field
> > > > > > placement of the structures the same? The alignment being reduced
> > > > > > should
> > > > > > not be a problem, as 128byte alignment is also valid as 64byte
> > > > > > alignment, after all.
> > > > >
> > > > > I'd say yes. Consider the following example:
> > > > >
> > > > > ---8<---
> > > > > #include <stdio.h>
> > > > > #include <stdlib.h>
> > > > >
> > > > > #define ALIGN 64
> > > > > /* #define ALIGN 128 */
> > > > >
> > > > > /* dummy rte_ring struct */
> > > > > struct rte_ring {
> > > > > char x[128];
> > > > > } __attribute__((aligned(ALIGN)));
> > > > >
> > > > > struct foo {
> > > > > struct rte_ring r;
> > > > > unsigned bar;
> > > > > };
> > > > >
> > > > > int main(void)
> > > > > {
> > > > > struct foo array[2];
> > > > >
> > > > > printf("sizeof(ring)=%zu diff=%u\n",
> > > > > sizeof(struct rte_ring),
> > > > > (unsigned int)((char *)&array[1].r - (char *)array));
> > > > >
> > > > > return 0;
> > > > > }
> > > > > ---8<---
> > > > >
> > > > > The size of rte_ring is always 128.
> > > > > diff is 192 or 256, depending on the value of ALIGN.
> > > > >
> > > > >
> > > > >
> > > > > Olivier
> > >
> > > About would it be an ABI breakage to 17.05 - I think would...
> > > Though for me the actual breakage happens in 17.05 when rte_ring
> > > alignment was increased from 64B 128B.
> > > Now we just restoring it.
> > >
> > Yes, ABI change was announced in advance and explicitly broken in 17.05.
> > There was no announcement of ABI break in 17.08 for rte_ring.
> >
> > > >
> > > > Yes, the diff will change, but that is after a recompile. If we have
> > > > rte_ring_create function always return a 128-byte aligned structure,
> > > > will any already-compiled apps fail to work if we also change the
> > > > alignment
> > > > of the rte_ring struct in the header?
> > >
> > > Why 128B?
> > > I thought we are discussing making rte_ring 64B aligned again?
> > >
> > > Konstantin
> >
> > To avoid possibly breaking apps compiled against 17.05 when run against
> > shared libs for 17.08. Having the extra alignment won't affect 17.08
> > apps, since they only require 64-byte alignment, but returning only
> > 64-byte aligned memory for apps which expect 128byte aligned memory may
> > cause issues.
> >
> > Therefore, we should reduce the required alignment to 64B, which should
> > only affect any apps that do a recompile, and have memory allocation for
> > rings return 128B aligned addresses to work with both 64B aligned and
> > 128B aligned ring structures.
>
> Ah, I see - you are talking just about rte_ring_create().
> BTW, are you sure that right now it allocates rings 128B aligned?
> As I can see it does just:
> mz = rte_memzone_reserve(mz_name, ring_size, socket_id, mz_flags);
> which means cache line alignment.
>
It doesn't currently allocate with that alignment, which is something we
need to fix - and what this patch was originally submitted to do. So I
think this patch should be applied, along with a further patch to reduce
the alignment going forward to avoid any other problems.
/Bruce
