-----Original Message-----
> Date: Wed, 10 May 2017 03:16:38 -0700
> From: Ashwin Sekhar T K <ashwin.sek...@caviumnetworks.com>
> To: tho...@monjalon.net, jerin.ja...@caviumnetworks.com,
> maciej.cze...@caviumnetworks.com, vikto...@rehivetech.com,
> jianbo....@linaro.org, bruce.richard...@intel.com,
> pablo.de.lara.gua...@intel.com, konstantin.anan...@intel.com
> Cc: dev@dpdk.org, Ashwin Sekhar T K <ashwin.sek...@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH 1/6] hash: compile armv8a CRC32 support
> conditionally
> X-Mailer: git-send-email 2.13.0.rc1
>
> Compile the armv8a CRC32 support only if the machine
> has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
> is defined.
>
> Removed the .arch assembly directives as these are no
> more necessary.
>
> Signed-off-by: Ashwin Sekhar T K <ashwin.sek...@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.ja...@caviumnetworks.com>
> ---
> lib/librte_hash/Makefile | 2 ++
> lib/librte_hash/rte_crc_arm64.h | 4 ----
> lib/librte_hash/rte_hash_crc.h | 2 +-
> 3 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/lib/librte_hash/Makefile b/lib/librte_hash/Makefile
> index d856aa26d..9cf13a045 100644
> --- a/lib/librte_hash/Makefile
> +++ b/lib/librte_hash/Makefile
> @@ -49,8 +49,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_HASH) += rte_fbk_hash.c
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include := rte_hash.h
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_hash_crc.h
> ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
> +ifneq ($(findstring RTE_MACHINE_CPUFLAG_CRC32,$(CFLAGS)),)
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_crc_arm64.h
> endif
> +endif
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_jhash.h
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_thash.h
> SYMLINK-$(CONFIG_RTE_LIBRTE_HASH)-include += rte_fbk_hash.h
> diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h
> index 7dd6334ee..91cde3b9d 100644
> --- a/lib/librte_hash/rte_crc_arm64.h
> +++ b/lib/librte_hash/rte_crc_arm64.h
> @@ -52,7 +52,6 @@ extern "C" {
> static inline uint32_t
> crc32c_arm64_u8(uint8_t data, uint32_t init_val)
> {
> - asm(".arch armv8-a+crc");
> __asm__ volatile(
> "crc32cb %w[crc], %w[crc], %w[value]"
> : [crc] "+r" (init_val)
> @@ -63,7 +62,6 @@ crc32c_arm64_u8(uint8_t data, uint32_t init_val)
> static inline uint32_t
> crc32c_arm64_u16(uint16_t data, uint32_t init_val)
> {
> - asm(".arch armv8-a+crc");
> __asm__ volatile(
> "crc32ch %w[crc], %w[crc], %w[value]"
> : [crc] "+r" (init_val)
> @@ -74,7 +72,6 @@ crc32c_arm64_u16(uint16_t data, uint32_t init_val)
> static inline uint32_t
> crc32c_arm64_u32(uint32_t data, uint32_t init_val)
> {
> - asm(".arch armv8-a+crc");
> __asm__ volatile(
> "crc32cw %w[crc], %w[crc], %w[value]"
> : [crc] "+r" (init_val)
> @@ -85,7 +82,6 @@ crc32c_arm64_u32(uint32_t data, uint32_t init_val)
> static inline uint32_t
> crc32c_arm64_u64(uint64_t data, uint32_t init_val)
> {
> - asm(".arch armv8-a+crc");
> __asm__ volatile(
> "crc32cx %w[crc], %w[crc], %x[value]"
> : [crc] "+r" (init_val)
> diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
> index 0f485b854..808a082c5 100644
> --- a/lib/librte_hash/rte_hash_crc.h
> +++ b/lib/librte_hash/rte_hash_crc.h
> @@ -453,7 +453,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
>
> static uint8_t crc32_alg = CRC32_SW;
>
> -#if defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
> #include "rte_crc_arm64.h"
> #else
>
> --
> 2.13.0.rc1
>
