A recent firmware change fixed an issue to acquire the PHY semaphore
before accessing PHY registers. This led to a case where SW can issue
a device reset clearing the MDIO registers. This patch makes SW acquire
the PHY semaphore before issuing a device reset.

Signed-off-by: Wei Dai <wei....@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x540.c | 8 ++++++++
 drivers/net/ixgbe/base/ixgbe_x550.c | 9 +++++++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_x540.c 
b/drivers/net/ixgbe/base/ixgbe_x540.c
index 499b1fa..f624d55 100644
--- a/drivers/net/ixgbe/base/ixgbe_x540.c
+++ b/drivers/net/ixgbe/base/ixgbe_x540.c
@@ -208,6 +208,7 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
 {
        s32 status;
        u32 ctrl, i;
+       u32 swfw_mask = hw->phy.phy_semaphore_mask;
 
        DEBUGFUNC("ixgbe_reset_hw_X540");
 
@@ -220,10 +221,17 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
        ixgbe_clear_tx_pending(hw);
 
 mac_reset_top:
+       status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
+       if (status != IXGBE_SUCCESS) {
+               ERROR_REPORT2(IXGBE_ERROR_CAUTION,
+                       "semaphore failed with %d", status);
+               return IXGBE_ERR_SWFW_SYNC;
+       }
        ctrl = IXGBE_CTRL_RST;
        ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
        IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
        IXGBE_WRITE_FLUSH(hw);
+       hw->mac.ops.release_swfw_sync(hw, swfw_mask);
 
        /* Poll for reset bit to self-clear indicating reset is complete */
        for (i = 0; i < 10; i++) {
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c 
b/drivers/net/ixgbe/base/ixgbe_x550.c
index 3049865..a48155c 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -2497,6 +2497,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
        u32 ctrl = 0;
        u32 i;
        bool link_up = false;
+       u32 swfw_mask = hw->phy.phy_semaphore_mask;
 
        DEBUGFUNC("ixgbe_reset_hw_X550em");
 
@@ -2561,9 +2562,17 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
                        ctrl = IXGBE_CTRL_RST;
        }
 
+       status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
+       if (status != IXGBE_SUCCESS) {
+               ERROR_REPORT2(IXGBE_ERROR_CAUTION,
+                               "semaphore failed with %d", status);
+               return IXGBE_ERR_SWFW_SYNC;
+       }
+
        ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
        IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
        IXGBE_WRITE_FLUSH(hw);
+       hw->mac.ops.release_swfw_sync(hw, swfw_mask);
 
        /* Poll for reset bit to self-clear meaning reset is complete */
        for (i = 0; i < 10; i++) {
-- 
2.7.4

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