This commit fixes pre-counter block (J0) padding by clearing four most significant bytes before setting initial counter value.
Fixes: b2bb3597470c ("crypto/aesni_gcm: move pre-counter block to driver") Signed-off-by: Arek Kusztal <arkadiuszx.kusz...@intel.com> --- drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c index dba5e15..af3d60f 100644 --- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c +++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c @@ -40,6 +40,7 @@ #include <rte_vdev.h> #include <rte_malloc.h> #include <rte_cpuflags.h> +#include <rte_byteorder.h> #include "aesni_gcm_pmd_private.h" @@ -241,7 +242,8 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_sym_op *op, * to set BE LSB to 1, driver expects that 16B is allocated */ if (op->cipher.iv.length == 12) { - op->cipher.iv.data[15] = 1; + uint32_t *iv_padd = (uint32_t *)&op->cipher.iv.data[12]; + *iv_padd = rte_bswap32(1); } if (op->auth.aad.length != 12 && op->auth.aad.length != 8 && -- 2.1.0