We already define I40E_AQ_PHY_TYPE_EXT_25G* flags in the response adminq
structure above, and do not need to re-define these.
While we are here, replace 0X with 0x as normal style.
Signed-off-by: Jingjing Wu <jingjing...@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index d4d2a7a..4e00516 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1785,8 +1785,8 @@ struct i40e_aq_get_phy_abilities_resp {
u8 d3_lpan;
#define I40E_AQ_SET_PHY_D3_LPAN_ENA 0x01
u8 phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
+#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0x01
+#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0x02
#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
u8 fec_cfg_curr_mod_ext_info;
@@ -1822,10 +1822,6 @@ struct i40e_aq_set_phy_config { /* same bits as above in
all */
__le32 eeer;
u8 low_power_ctrl;
u8 phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
-#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
-#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
u8 fec_config;
#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
--
2.4.11
