On Tue, Jul 05, 2016 at 12:02:41PM +0200, Jan M?dala wrote: > Bruce, > > Here's explanation of readless communication (on behalf of Alex): > > > "readless" refers to ability to read ENA registers without actually > > issuing read request from host (x86). > > Instead, host programs 2 registers on device that trigger DMA from device > > to host and report register value. > > However, this functionality is not going to be available in all type of > > devices. The decision if this mode is supported or not , is taken from > > revision_id in pci configuration space. > >
Thanks, I'll add this into the commit message to help explain things to anyone looking at the commit later. /Bruce > Regards > > Jan > > 2016-07-04 17:43 GMT+02:00 Bruce Richardson <bruce.richardson at intel.com>: > > > On Thu, Jun 30, 2016 at 05:04:56PM +0200, Jan Medala wrote: > > > Depending on HW revision readless communcation between host and device > > > may be unavailable. > > > In that case prevent PMD of seting up readless communication mechanism. > > > > > The idea of readless communication is a strange one. Can you provide a bit > > more detail as to what "readless communication" refers to. > > > > /Bruce > >
