>-----Original Message----- >From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Liming Sun >Sent: Wednesday, December 23, 2015 3:50 AM >To: dev at dpdk.org >Subject: [dpdk-dev] [PATCH 1/2] driver/net/mpipe: add rte_vect.h and enable >CONFIG_RTE_LIBRTE_LPM > >rte_vect.h was missing earlier thus LPM was disabled and l3fwd is >not able to compile. This commit implements the vector api and >enable LPM in the tilegx configuration by default. It also includes >a minor optimization to use __insn_fetchadd4() instead of >rte_atomic32_xxx() in mpipe_dp_enter/mpipe_dp_exit to avoid the >unnecessary memory fence. > >Signed-off-by: Liming Sun <lsun at ezchip.com> >--- > config/defconfig_tile-tilegx-linuxapp-gcc | 2 +- > drivers/net/mpipe/mpipe_tilegx.c | 18 +++- > lib/librte_eal/common/include/arch/tile/rte_vect.h | 93 >++++++++++++++++++++ > 3 files changed, 107 insertions(+), 6 deletions(-) > create mode 100644 lib/librte_eal/common/include/arch/tile/rte_vect.h > >diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc >b/config/defconfig_tile-tilegx-linuxapp-gcc >index fb61bcd..39794f6 100644 >--- a/config/defconfig_tile-tilegx-linuxapp-gcc >+++ b/config/defconfig_tile-tilegx-linuxapp-gcc >@@ -64,7 +64,7 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n > > # This following libraries are not available on the tile architecture. > # So they're turned off. >-CONFIG_RTE_LIBRTE_LPM=n >+CONFIG_RTE_LIBRTE_LPM=y > CONFIG_RTE_LIBRTE_ACL=n > CONFIG_RTE_LIBRTE_SCHED=n > CONFIG_RTE_LIBRTE_PORT=n >diff --git a/drivers/net/mpipe/mpipe_tilegx.c >b/drivers/net/mpipe/mpipe_tilegx.c >index 5845511..8d006fa 100644 >--- a/drivers/net/mpipe/mpipe_tilegx.c >+++ b/drivers/net/mpipe/mpipe_tilegx.c >@@ -451,13 +451,13 @@ static inline void > mpipe_dp_enter(struct mpipe_dev_priv *priv) > { > __insn_mtspr(SPR_DSTREAM_PF, 0); >- rte_atomic32_inc(&priv->dp_count); >+ __insn_fetchadd4(&priv->dp_count, 1); > } > > static inline void > mpipe_dp_exit(struct mpipe_dev_priv *priv) > { >- rte_atomic32_dec(&priv->dp_count); >+ __insn_fetchadd4(&priv->dp_count, -1); > } > > static inline void >@@ -484,12 +484,20 @@ mpipe_recv_mbuf(struct mpipe_dev_priv *priv, >gxio_mpipe_idesc_t *idesc, > uint16_t size = gxio_mpipe_idesc_get_xfer_size(idesc); > struct rte_mbuf *mbuf = RTE_PTR_SUB(va, priv->rx_offset); > >- rte_pktmbuf_reset(mbuf); > mbuf->data_off = (uintptr_t)va - (uintptr_t)mbuf->buf_addr; >- mbuf->port = in_port; >- mbuf->data_len = size; >+ mbuf->nb_segs = 1; >+ mbuf->port = in_port; >+ mbuf->ol_flags = 0; >+ if (gxio_mpipe_idesc_get_ethertype(idesc) == ETHER_TYPE_IPv4) >+ mbuf->packet_type = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L2_ETHER; >+ else if (gxio_mpipe_idesc_get_ethertype(idesc) == ETHER_TYPE_IPv6) >+ mbuf->packet_type = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L2_ETHER; >+ else >+ mbuf->packet_type = RTE_PTYPE_UNKNOWN; > mbuf->pkt_len = size; >+ mbuf->data_len = size; > mbuf->hash.rss = gxio_mpipe_idesc_get_flow_hash(idesc); >+ mbuf->next = NULL; > > PMD_DEBUG_RX("%s: RX mbuf %p, buffer %p, buf_addr %p, size %d\n", > mpipe_name(priv), mbuf, va, mbuf->buf_addr, size); >diff --git a/lib/librte_eal/common/include/arch/tile/rte_vect.h >b/lib/librte_eal/common/include/arch/tile/rte_vect.h >new file mode 100644 >index 0000000..32d768a >--- /dev/null >+++ b/lib/librte_eal/common/include/arch/tile/rte_vect.h >@@ -0,0 +1,93 @@ >+/* >+ * BSD LICENSE >+ * >+ * Copyright (C) EZchip Semiconductor Ltd. 2015. >+ * >+ * Redistribution and use in source and binary forms, with or without >+ * modification, are permitted provided that the following conditions >+ * are met: >+ * >+ * * Redistributions of source code must retain the above copyright >+ * notice, this list of conditions and the following disclaimer. >+ * * Redistributions in binary form must reproduce the above copyright >+ * notice, this list of conditions and the following disclaimer in >+ * the documentation and/or other materials provided with the >+ * distribution. >+ * * Neither the name of EZchip Semiconductor nor the names of its >+ * contributors may be used to endorse or promote products derived >+ * from this software without specific prior written permission. >+ * >+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND >CONTRIBUTORS >+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT >NOT >+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND >FITNESS FOR >+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE >COPYRIGHT >+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, >INCIDENTAL, >+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT >NOT >+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS >OF USE, >+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED >AND ON ANY >+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR >TORT >+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF >THE USE >+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH >DAMAGE. >+*/ >+ >+#ifndef _RTE_VECT_H_ >+#define _RTE_VECT_H_ >+ >+#ifdef __cplusplus >+extern "C" { >+#endif >+ >+typedef __int128 __m128i; >+ >+#define XMM_SIZE sizeof(__m128i) >+#define XMM_MASK (XMM_SIZE - 1) >+ >+typedef union rte_xmm { >+ __m128i x; >+ uint32_t u32[XMM_SIZE / sizeof(uint32_t)]; >+ uint64_t u64[XMM_SIZE / sizeof(uint64_t)]; >+} rte_xmm_t; >+ >+/* Extracts the low order 64-bit integer. */ >+#define _mm_cvtsi128_si64(a) ((rte_xmm_t*)&a)->u64[0] >+ >+/* Sets the 2 signed 64-bit integer values. */ >+#define _mm_set_epi64x(i1, i0) ({ \ >+ rte_xmm_t m; \ >+ m.u64[0] = i0; \ >+ m.u64[1] = i1; \ >+ (m.x); \ >+}) >+ >+/* Sets the 4 signed 32-bit integer values. */ >+#define _mm_set_epi32(i3, i2, i1, i0) ({ \ >+ rte_xmm_t m; \ >+ m.u32[0] = i0; \ >+ m.u32[1] = i1; \ >+ m.u32[2] = i2; \ >+ m.u32[3] = i3; \ >+ (m.x); \ >+}) >+ >+/* Shifts right the 4 32-bit integers by count bits with zeros. */ >+#define _mm_srli_epi32(v, cnt) ({ \ >+ rte_xmm_t m; \ >+ m.u64[0] = __insn_v4shru(((rte_xmm_t*)&(v))->u64[0], cnt); \ >+ m.u64[1] = __insn_v4shru(((rte_xmm_t*)&(v))->u64[1], cnt); \ >+ (m.x); \ >+}) >+ >+/* Shifts the 128-bit value in a right by imm bytes. */ >+#define _mm_srli_si128(v, imm) ((v) >> (imm * sizeof(uint8_t))) >+ >+/* Bitwise AND of the 128-bit value in a and the 128-bit value in b. */ >+#define _mm_and_si128(a, b) ((a) & (b)) >+ >+/* Loads 128-bit value. */ >+#define _mm_loadu_si128(p) (*(p)) >+ >+#ifdef __cplusplus >+} >+#endif >+ >+#endif /* _RTE_VECT_H_ */ >-- >1.7.1
Acked-by: Zhigang Lu <zlu at ezchip.com>
