> -----Original Message-----
> From: Akhil Goyal <[email protected]>
> Sent: Friday 7 August 2026 11:17
> To: [email protected]
> Cc: [email protected]; [email protected]; [email protected]; 
> [email protected]; Akhil Goyal
> <[email protected]>; [email protected]; Marat Khalili 
> <[email protected]>
> Subject: [PATCH] raw/cnxk_bphy: fix missing doxygen comments
> 
> Documentation build for raw driver cnxk_bphy,
> if included in `doc/api/doxy-api.conf.in`,
> fails because of missing dozygen comments.
> Added comments to fix the doc build.
> 
> Bugzilla ID: 1962
> Fixes: 2e8bd307fae3 ("common/cnxk: support switching CPRI/ETH back and forth")
> Fixes: bd2fd34ab86f ("common/cnxk: sync eth mode change command with 
> firmware")
> Cc: [email protected]
> 
> Reported-by: Marat Khalili <[email protected]>
> Signed-off-by: Akhil Goyal <[email protected]>

Thank you for handling this!

Acked-by: Marat Khalili <[email protected]>
Tested-by: Marat Khalili <[email protected]>

> ---
>  doc/api/doxy-api.conf.in             | 1 +
>  drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
> index bedd944681..94096ee710 100644
> --- a/doc/api/doxy-api.conf.in
> +++ b/doc/api/doxy-api.conf.in
> @@ -24,6 +24,7 @@ INPUT                   = 
> @TOPDIR@/doc/api/doxy-api-index.md \
>                            @TOPDIR@/drivers/net/intel/ixgbe \
>                            @TOPDIR@/drivers/net/mlx5 \
>                            @TOPDIR@/drivers/net/softnic \
> +                          @TOPDIR@/drivers/raw/cnxk_bphy \
>                            @TOPDIR@/drivers/raw/dpaa2_cmdif \
>                            @TOPDIR@/drivers/raw/ifpga \
>                            @TOPDIR@/lib/eal/include \
> diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h 
> b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> index f668e6ea82..99504dc496 100644
> --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> @@ -174,6 +174,7 @@ enum cnxk_bphy_cgx_eth_link_mode {
>       __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
>  };
> 
> +/** Available CPRI modes */
>  enum cnxk_bphy_cgx_eth_mode_cpri {
>       /** 2.4G Lane Rate */
>       CNXK_BPHY_CGX_ETH_MODE_CPRI_2_4G_BIT,
> @@ -191,6 +192,7 @@ enum cnxk_bphy_cgx_eth_mode_cpri {
>       CNXK_BPHY_CGX_ETH_MODE_CPRI_24_3G_BIT,
>  };
> 
> +/** Available mode groups */
>  enum cnxk_bphy_cgx_mode_group {
>       /** ETH group */
>       CNXK_BPHY_CGX_MODE_GROUP_ETH,
> --
> 2.43.0
> 

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