Below are the features that we're planning to submit for the 17.02 release. We'll submit a patch to update the roadmap page with this info.
Some things will obviously change during planning/development, so we'll provide a more detailed update in late September/early October. After that, things should hopefully be relatively stable. It would be good if others are also willing to share their plans so that we can build up a complete picture of what's planned for 17.02 and make sure there's no duplication. Consistent Filter API phase 2: Extend support for the Consistent Filter API that will be first implemented in 16.11 to IGB and FM10K. Elastic Flow Distributor: The Elastic Flow Distributor (EFD) is a flow-based load balancing library which scales linearly for both lookup and insert with the number of threads or cores. EFD lookup uses a "perfect hashing" scheme where only the information needed to compute a key's value (and not the key itself) is stored in the lookup table, thus reducing CPU cache storage requirements. Cryptodev: Additional Software Algorithms: - Optimize the AES-GCM software PMD. - Enhance the Intel(r) AES-NI MB PMD to add support for cipher-only and authentication-only operations. Add support for AES_CBC_MAC, AES_CMAC_128, AES_GMAC_128. - Add software support for: 3DES_ECB_128/192, AES_ECB_128/192/256, AES_F8, AES_XTS, ARC4. Run-Time Configuration of Flow Type (PCTYPE) and Packet Type (PTYPE) for I40E: At the moment all flow types and packet types in DPDK are statically defined. This makes impossible to add new values without first defining them statically and then recompiling DPDK. The ability to configure flow types and packet types at run time will be added for I40E. Extended Stats Latency and Bit Rate Statistics: Enhance the Extended NIC Stats (Xstats) implementation to support the collection and reporting of latency and bit rate measurements. Latency statistics will include min, max and average latency, and jitter. Bit rate statistics will include peak and average bit rate aggregated over a user-defined time period. This will be implemented for IXGBE and I40E. Hardware QoS for IXGBE and I40E: Implement support for Hardware QoS for IXGBE and I40E. This involves using DCB so that a PF or VF can receive packets for each of the Traffic Classes (TCs) based on the User Priority field (in the VLAN header). Bandwidth on transmit for each TC is programmable.
