Hello Bruce, On Wed, Mar 19, 2025 at 6:30 PM Bruce Richardson <bruce.richard...@intel.com> wrote: > @@ -211,7 +211,7 @@ avx512_vpclmulqdq_init(void) > static const rte_net_crc_handler * > sse42_pclmulqdq_get_handlers(void) > { > -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT > +#ifdef RTE_ARCH_X86_64 > if (SSE42_PCLMULQDQ_CPU_SUPPORTED && > max_simd_bitwidth >= RTE_VECT_SIMD_128) > return handlers_sse42; > @@ -223,7 +223,7 @@ sse42_pclmulqdq_get_handlers(void) > static void > sse42_pclmulqdq_init(void) > { > -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT > +#ifdef RTE_ARCH_x86_64
RTE_ARCH_X86_64 > if (SSE42_PCLMULQDQ_CPU_SUPPORTED) > rte_net_crc_sse42_init(); > #endif -- David Marchand