Up to now MSVC has being used with the default mode, which uses SSE2 instructions for scalar floating-point and vector calculations. https://learn.microsoft.com/en-us/cpp/build/reference/arch-x64?view=msvc-170
This series allows users to specify the CPU for which the generated code should be optimized for in the same way it's done for GCC: by passing the CPU name. When no explicit CPU name is passed, 'native' is assumed (like it happens with GCC) and the code will be optimized for the same CPU type used to compile the code. MSVC does not provide this functionality natively, so logic was added to handle these differences, detecting which instruction sets are supported by the CPU(s), passing the best options to MSVC and setting the correct macros (like __AVX512F__) so that the DPDK code can rely on them like it is done with GCC. Andre Muezerie (6): eal: make compatible with instruction set updates for MSVC eal: only use numbers as align parameters for MSVC config: allow faster instruction sets to be used with MSVC drivers/net: make compatible with instruction set updates for MSVC acl: make compatible with instruction set updates for MSVC member: make compatible with instruction set updates for MSVC config/x86/meson.build | 364 +++++++++++++++++++++++++---- drivers/net/bnxt/meson.build | 2 +- drivers/net/enic/meson.build | 2 +- drivers/net/intel/i40e/meson.build | 2 +- drivers/net/intel/iavf/meson.build | 2 +- drivers/net/intel/ice/meson.build | 2 +- drivers/net/intel/idpf/meson.build | 2 +- drivers/net/nfp/meson.build | 2 +- drivers/net/octeon_ep/meson.build | 4 +- lib/acl/meson.build | 16 +- lib/eal/common/rte_random.c | 2 + lib/eal/x86/include/rte_vect.h | 11 +- lib/member/meson.build | 11 +- 13 files changed, 363 insertions(+), 59 deletions(-) -- 2.48.1.vfs.0.0
