> Compiling with MSVC results in the error below:
>
> app/test/test_ring_perf.c(197): error C7712: address argument to atomic
> operation must be a pointer to an atomic integer,
> 'volatile unsigned int *' is not valid
>
> The fix is to mark lcore_count as atomic.
>
> Signed-off-by: Andre Muezerie <andre...@linux.microsoft.com>
> Signed-off-by: Chengwen Feng <fengcheng...@huawei.com>
> ---
> app/test/test_ring_perf.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/app/test/test_ring_perf.c b/app/test/test_ring_perf.c
> index 57cd04a124..366e256323 100644
> --- a/app/test/test_ring_perf.c
> +++ b/app/test/test_ring_perf.c
> @@ -34,7 +34,7 @@ struct lcore_pair {
> unsigned c1, c2;
> };
>
> -static volatile unsigned lcore_count = 0;
> +static RTE_ATOMIC(unsigned int) lcore_count;
But for not-MSVC builds RTE_ATOMIC() by default means nothing.
If you are removing volatile, then I think, you need to fix the code to ensure
that all reads/writes to this var are done with atomic ops.
Or have both - volatile and RTE_ATOMIC()
> static void
> test_ring_print_test_string(unsigned int api_type, int esize,
> @@ -193,11 +193,7 @@ enqueue_dequeue_bulk_helper(const unsigned int flag,
> struct thread_params *p)
> unsigned int n_remaining;
> const unsigned int bulk_n = bulk_sizes[p->ring_params->bulk_sizes_i];
>
> -#ifdef RTE_USE_C11_MEM_MODEL
> if (rte_atomic_fetch_add_explicit(&lcore_count, 1,
> rte_memory_order_relaxed) + 1 != 2)
> -#else
> - if (__sync_add_and_fetch(&lcore_count, 1) != 2)
> -#endif
> while(lcore_count != 2)
> rte_pause();
>
> --
> 2.48.1.vfs.0.0
>
