Hi Brian,
> -----Original Message-----
> From: Dooley, Brian <brian.doo...@intel.com>
> Sent: Monday, January 13, 2025 6:10 PM
> Cc: dev@dpdk.org; gak...@marvell.com; Ji, Kai <kai...@intel.com>; De Lara
> Guarch, Pablo <pablo.de.lara.gua...@intel.com>; Dooley, Brian
> <brian.doo...@intel.com>
> Subject: [PATCH v3 1/2] crypto/ipsec_mb: add SM4 GCM support
>
> This patch introduces SM4 GCM algorithm support to the AESNI_MB PMD.
> SM4 GCM is available in the v2.0 release of Intel IPsec MB.
>
> Signed-off-by: Brian Dooley <brian.doo...@intel.com>
> ---
A couple of comments below.
Thanks,
Pablo
...
> --- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
> +++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
> @@ -826,6 +826,36 @@ static const struct rte_cryptodev_capabilities
> aesni_mb_capabilities[] = {
> }, }
> }, }
> },
> + { /* SM4 GCM */
> + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> + {.sym = {
> + .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
> + {.aead = {
> + .algo = RTE_CRYPTO_AEAD_SM4_GCM,
> + .block_size = 16,
> + .key_size = {
> + .min = 16,
> + .max = 16,
> + .increment = 0,
> + },
> + .digest_size = {
> + .min = 16,
> + .max = 16,
> + .increment = 0,
Digest size can be 1 to 16 bytes.
> + },
> + .aad_size = {
> + .min = 0,
> + .max = 65535,
> + .increment = 1,
> + },
> + .iv_size = {
> + .min = 12,
> + .max = 12,
> + .increment = 0,
> + }
> + }, }
> + }, }
> + },
> #endif
> RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
> };
> diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
> index 505356ff44..b47e52f63b 100644
> --- a/lib/cryptodev/rte_crypto_sym.h
> +++ b/lib/cryptodev/rte_crypto_sym.h
> @@ -482,8 +482,10 @@ enum rte_crypto_aead_algorithm {
> /**< AES algorithm in CCM mode. */
> RTE_CRYPTO_AEAD_AES_GCM,
> /**< AES algorithm in GCM mode. */
> - RTE_CRYPTO_AEAD_CHACHA20_POLY1305
> + RTE_CRYPTO_AEAD_CHACHA20_POLY1305,
> /**< Chacha20 cipher with poly1305 authenticator */
> + RTE_CRYPTO_AEAD_SM4_GCM
> + /**< SM4 cipher with GCM mode */
To keep consistency, "in GCM mode".
> };
