From: Dengdui Huang <huangdeng...@huawei.com>

There is low probability that the driver reset timeout, the root cause is
that the firmware processing take a litter long than normal when process
reset command. This patch fix it by changing the timeout of the reset
command to 100 ms.

Fixes: 737f30e1c3ab ("net/hns3: support command interface with firmware")
Cc: sta...@dpdk.org

Signed-off-by: Dengdui Huang <huangdeng...@huawei.com>
---
 drivers/net/hns3/hns3_cmd.c | 18 ++++++++++++------
 drivers/net/hns3/hns3_cmd.h |  4 ++--
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 146444e2fa99..398b75384ee9 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -304,8 +304,17 @@ hns3_cmd_get_hardware_reply(struct hns3_hw *hw,
        return hns3_cmd_convert_err_code(desc_ret);
 }
 
-static int hns3_cmd_poll_reply(struct hns3_hw *hw)
+static uint32_t hns3_get_cmd_tx_timeout(uint16_t opcode)
 {
+       if (opcode == HNS3_OPC_CFG_RST_TRIGGER)
+               return HNS3_COMQ_CFG_RST_TIMEOUT;
+
+       return HNS3_CMDQ_TX_TIMEOUT_DEFAULT;
+}
+
+static int hns3_cmd_poll_reply(struct hns3_hw *hw, uint16_t opcode)
+{
+       uint32_t cmdq_tx_timeout = hns3_get_cmd_tx_timeout(opcode);
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        uint32_t timeout = 0;
 
@@ -326,7 +335,7 @@ static int hns3_cmd_poll_reply(struct hns3_hw *hw)
 
                rte_delay_us(1);
                timeout++;
-       } while (timeout < hw->cmq.tx_timeout);
+       } while (timeout < cmdq_tx_timeout);
        hns3_err(hw, "Wait for reply timeout");
        return -ETIME;
 }
@@ -400,7 +409,7 @@ hns3_cmd_send(struct hns3_hw *hw, struct hns3_cmd_desc 
*desc, int num)
         * if multi descriptors to be sent, use the first one to check.
         */
        if (HNS3_CMD_SEND_SYNC(rte_le_to_cpu_16(desc->flag))) {
-               retval = hns3_cmd_poll_reply(hw);
+               retval = hns3_cmd_poll_reply(hw, desc->opcode);
                if (!retval)
                        retval = hns3_cmd_get_hardware_reply(hw, desc, num,
                                                             ntc);
@@ -611,9 +620,6 @@ hns3_cmd_init_queue(struct hns3_hw *hw)
        hw->cmq.csq.desc_num = HNS3_NIC_CMQ_DESC_NUM;
        hw->cmq.crq.desc_num = HNS3_NIC_CMQ_DESC_NUM;
 
-       /* Setup Tx write back timeout */
-       hw->cmq.tx_timeout = HNS3_CMDQ_TX_TIMEOUT;
-
        /* Setup queue rings */
        ret = hns3_alloc_cmd_queue(hw, HNS3_TYPE_CSQ);
        if (ret) {
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index 79a8c1edad56..4d707c13b29b 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -10,7 +10,8 @@
 #include <rte_byteorder.h>
 #include <rte_spinlock.h>
 
-#define HNS3_CMDQ_TX_TIMEOUT           30000
+#define HNS3_CMDQ_TX_TIMEOUT_DEFAULT   30000
+#define HNS3_COMQ_CFG_RST_TIMEOUT      100000
 #define HNS3_CMDQ_CLEAR_WAIT_TIME      200
 #define HNS3_CMDQ_RX_INVLD_B           0
 #define HNS3_CMDQ_RX_OUTVLD_B          1
@@ -62,7 +63,6 @@ enum hns3_cmd_return_status {
 struct hns3_cmq {
        struct hns3_cmq_ring csq;
        struct hns3_cmq_ring crq;
-       uint16_t tx_timeout;
        enum hns3_cmd_return_status last_status;
 };
 
-- 
2.33.0

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