Move some fields about to better pack the Tx queue structure and make
sure all data used by the vector codepaths is on the first cacheline of
the structure. Checking with "pahole" on 64-bit build, only one 6-byte
hole is left in the structure - on second cacheline - after this patch.
As part of the reordering, move the p/h/wthresh values to the
ixgbe-specific part of the union. That is the only driver which actually
uses those values. i40e and ice drivers just record the values for later
return, so we can drop them from the Tx queue structure for those
drivers and just report the defaults in all cases.
Signed-off-by: Bruce Richardson <bruce.richard...@intel.com>
---
drivers/net/intel/common/tx.h | 12 +++++-------
drivers/net/intel/i40e/i40e_rxtx.c | 9 +++------
drivers/net/intel/ice/ice_rxtx.c | 9 +++------
3 files changed, 11 insertions(+), 19 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index 51ae3b051d..c372d2838b 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -41,7 +41,6 @@ struct ci_tx_queue {
struct ci_tx_entry *sw_ring; /* virtual address of SW ring */
struct ci_tx_entry_vec *sw_ring_vec;
};
- rte_iova_t tx_ring_dma; /* TX ring DMA address */
uint16_t nb_tx_desc; /* number of TX descriptors */
uint16_t tx_tail; /* current value of tail register */
uint16_t nb_tx_used; /* number of TX desc used since RS bit set */
@@ -55,16 +54,14 @@ struct ci_tx_queue {
uint16_t tx_free_thresh;
/* Number of TX descriptors to use before RS bit is set. */
uint16_t tx_rs_thresh;
- uint8_t pthresh; /**< Prefetch threshold register. */
- uint8_t hthresh; /**< Host threshold register. */
- uint8_t wthresh; /**< Write-back threshold reg. */
uint16_t port_id; /* Device port identifier. */
uint16_t queue_id; /* TX queue index. */
uint16_t reg_idx;
- uint64_t offloads;
uint16_t tx_next_dd;
uint16_t tx_next_rs;
+ uint64_t offloads;
uint64_t mbuf_errors;
+ rte_iova_t tx_ring_dma; /* TX ring DMA address */
bool tx_deferred_start; /* don't start this queue in dev start */
bool q_set; /* indicate if tx queue has been configured */
union { /* the VSI this queue belongs to */
@@ -95,9 +92,10 @@ struct ci_tx_queue {
const struct ixgbe_txq_ops *ops;
struct ixgbe_advctx_info *ctx_cache;
uint32_t ctx_curr;
-#ifdef RTE_LIB_SECURITY
+ uint8_t pthresh; /**< Prefetch threshold register. */
+ uint8_t hthresh; /**< Host threshold register. */
+ uint8_t wthresh; /**< Write-back threshold reg. */
uint8_t using_ipsec; /**< indicates that IPsec TX
feature is in use */
-#endif
};
};
};
diff --git a/drivers/net/intel/i40e/i40e_rxtx.c
b/drivers/net/intel/i40e/i40e_rxtx.c
index 305bc53480..539b170266 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.c
+++ b/drivers/net/intel/i40e/i40e_rxtx.c
@@ -2539,9 +2539,6 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
txq->nb_tx_desc = nb_desc;
txq->tx_rs_thresh = tx_rs_thresh;
txq->tx_free_thresh = tx_free_thresh;
- txq->pthresh = tx_conf->tx_thresh.pthresh;
- txq->hthresh = tx_conf->tx_thresh.hthresh;
- txq->wthresh = tx_conf->tx_thresh.wthresh;
txq->queue_id = queue_idx;
txq->reg_idx = reg_idx;
txq->port_id = dev->data->port_id;
@@ -3310,9 +3307,9 @@ i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t
queue_id,
qinfo->nb_desc = txq->nb_tx_desc;
- qinfo->conf.tx_thresh.pthresh = txq->pthresh;
- qinfo->conf.tx_thresh.hthresh = txq->hthresh;
- qinfo->conf.tx_thresh.wthresh = txq->wthresh;
+ qinfo->conf.tx_thresh.pthresh = I40E_DEFAULT_TX_PTHRESH;
+ qinfo->conf.tx_thresh.hthresh = I40E_DEFAULT_TX_HTHRESH;
+ qinfo->conf.tx_thresh.wthresh = I40E_DEFAULT_TX_WTHRESH;
qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
qinfo->conf.tx_rs_thresh = txq->tx_rs_thresh;
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index 395cf46565..8d2dd5074e 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -1493,9 +1493,6 @@ ice_tx_queue_setup(struct rte_eth_dev *dev,
txq->nb_tx_desc = nb_desc;
txq->tx_rs_thresh = tx_rs_thresh;
txq->tx_free_thresh = tx_free_thresh;
- txq->pthresh = tx_conf->tx_thresh.pthresh;
- txq->hthresh = tx_conf->tx_thresh.hthresh;
- txq->wthresh = tx_conf->tx_thresh.wthresh;
txq->queue_id = queue_idx;
txq->reg_idx = vsi->base_queue + queue_idx;
@@ -1584,9 +1581,9 @@ ice_txq_info_get(struct rte_eth_dev *dev, uint16_t
queue_id,
qinfo->nb_desc = txq->nb_tx_desc;
- qinfo->conf.tx_thresh.pthresh = txq->pthresh;
- qinfo->conf.tx_thresh.hthresh = txq->hthresh;
- qinfo->conf.tx_thresh.wthresh = txq->wthresh;
+ qinfo->conf.tx_thresh.pthresh = ICE_DEFAULT_TX_PTHRESH;
+ qinfo->conf.tx_thresh.hthresh = ICE_DEFAULT_TX_HTHRESH;
+ qinfo->conf.tx_thresh.wthresh = ICE_DEFAULT_TX_WTHRESH;
qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
qinfo->conf.tx_rs_thresh = txq->tx_rs_thresh;
--
2.43.0
