Re: [PATCH 13/16] crypto/dpaa_sec: fix bitmask truncation

[Hemant Agrawal]

On 15-11-2024 11:35, Stephen Hemminger wrote:

The dqrr_held mask is 64 bit but updates were getting truncated
because 1 is of type int (32 bit) and the result shift of int is of
type int (32 bit); therefore any value >= 32 would get truncated.

Link: https://pvs-studio.com/en/blog/posts/cpp/1183/

Fixes: fe3688ba7950 ("crypto/dpaa_sec: support event crypto adapter")
Cc: akhil.go...@nxp.com
Cc: sta...@dpdk.org

Signed-off-by: Stephen Hemminger <step...@networkplumber.org>
---
  drivers/crypto/dpaa_sec/dpaa_sec.c | 7 +++----
  1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c 
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 3fa88ca968..e117cd77a6 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1907,13 +1907,12 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op 
**ops,
                        op = *(ops++);
                        if (*dpaa_seqn(op->sym->m_src) != 0) {
                                index = *dpaa_seqn(op->sym->m_src) - 1;
-                               if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
+                               if (DPAA_PER_LCORE_DQRR_HELD & (UINT64_C(1) << 
index)) {
                                        /* QM_EQCR_DCA_IDXMASK = 0x0f */
                                        flags[loop] = ((index & 0x0f) << 8);
                                        flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
                                        DPAA_PER_LCORE_DQRR_SIZE--;
-                                       DPAA_PER_LCORE_DQRR_HELD &=
-                                                               ~(1 << index);
+                                       DPAA_PER_LCORE_DQRR_HELD &= ~(UINT64_C(1) 
<< index);
                                }
                        }

@@ -3500,7 +3499,7 @@ dpaa_sec_process_atomic_event(void *event,

        /* Save active dqrr entries */
        index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1);
        DPAA_PER_LCORE_DQRR_SIZE++;
-       DPAA_PER_LCORE_DQRR_HELD |= 1 << index;
+       DPAA_PER_LCORE_DQRR_HELD |= UINT64_C(1) << index;
        DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src;
        ev->impl_opaque = index + 1;
        *dpaa_seqn(ctx->op->sym->m_src) = (uint32_t)index + 1;

Acked-by: Hemant Agrawal <hemant.agra...@nxp.com>