Add functions to operate hardware queue,
such as queue start,stop and clear.
Signed-off-by: Hanxiao Li <li.hanx...@zte.com.cn>
---
drivers/common/zsda/meson.build | 1 +
drivers/common/zsda/zsda_device.c | 7 +
drivers/common/zsda/zsda_qp.c | 196 +++++++++++++++++++++++++++
drivers/common/zsda/zsda_qp.h | 37 +++++
drivers/common/zsda/zsda_qp_common.h | 27 ++++
5 files changed, 268 insertions(+)
create mode 100644 drivers/common/zsda/zsda_qp.c
create mode 100644 drivers/common/zsda/zsda_qp.h
create mode 100644 drivers/common/zsda/zsda_qp_common.h
diff --git a/drivers/common/zsda/meson.build b/drivers/common/zsda/meson.build
index 342d000c6d..4c910d7e7d 100644
--- a/drivers/common/zsda/meson.build
+++ b/drivers/common/zsda/meson.build
@@ -11,4 +11,5 @@ deps += ['bus_pci', 'mbuf']
sources += files(
'zsda_device.c',
'zsda_logs.c',
+ 'zsda_qp.c',
)
diff --git a/drivers/common/zsda/zsda_device.c
b/drivers/common/zsda/zsda_device.c
index 1be3ea8016..5c835651ea 100644
--- a/drivers/common/zsda/zsda_device.c
+++ b/drivers/common/zsda/zsda_device.c
@@ -10,6 +10,7 @@
#include "zsda_device.h"
#include "zsda_logs.h"
+#include "zsda_qp.h"
/* per-process array of device data */
struct zsda_device_info zsda_devs[RTE_PMD_ZSDA_MAX_PCI_DEVICES];
@@ -170,6 +171,12 @@ zsda_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
return -ENODEV;
}
+ ret = zsda_queue_init(zsda_pci_dev);
+ if (ret) {
+ ZSDA_LOG(ERR, "Failed! queue init.");
+ return ret;
+ }
+
return ret;
}
diff --git a/drivers/common/zsda/zsda_qp.c b/drivers/common/zsda/zsda_qp.c
new file mode 100644
index 0000000000..8060d89ea1
--- /dev/null
+++ b/drivers/common/zsda/zsda_qp.c
@@ -0,0 +1,196 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 ZTE Corporation
+ */
+
+#include <stdint.h>
+
+#include <rte_malloc.h>
+
+#include "zsda_logs.h"
+#include "zsda_device.h"
+#include "zsda_qp.h"
+#include "zsda_qp_common.h"
+
+static uint8_t zsda_num_used_qps;
+
+static uint8_t
+zsda_get_num_used_qps(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ uint8_t num_used_qps;
+
+ num_used_qps = ZSDA_CSR_READ8(mmio_base + 0);
+
+ return num_used_qps;
+}
+
+static int
+zsda_check_write(uint8_t *addr, const uint32_t dst_value)
+{
+ int times = ZSDA_TIME_NUM;
+ uint32_t val;
+
+ val = ZSDA_CSR_READ32(addr);
+
+ while ((val != dst_value) && times--) {
+ val = ZSDA_CSR_READ32(addr);
+ rte_delay_us_sleep(ZSDA_TIME_SLEEP_US);
+ }
+ if (val == dst_value)
+ return ZSDA_SUCCESS;
+ else
+ return ZSDA_FAILED;
+}
+
+static int
+zsda_admin_q_start(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ int ret;
+
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_START, 0);
+
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_START, ZSDA_Q_START);
+ ret = zsda_check_write(mmio_base + ZSDA_ADMIN_Q_START, ZSDA_Q_START);
+
+ return ret;
+}
+
+static int __rte_unused
+zsda_admin_q_stop(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ int ret;
+
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_STOP_RESP, ZSDA_RESP_INVALID);
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_STOP, ZSDA_Q_STOP);
+
+ ret = zsda_check_write(mmio_base + ZSDA_ADMIN_Q_STOP_RESP,
+ ZSDA_RESP_VALID);
+
+ if (ret)
+ ZSDA_LOG(INFO, "Failed! zsda_admin q stop");
+
+ return ret;
+}
+
+static int __rte_unused
+zsda_admin_q_clear(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ int ret;
+
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_CLR_RESP, ZSDA_RESP_INVALID);
+ ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_Q_CLR, ZSDA_RESP_VALID);
+
+ ret = zsda_check_write(mmio_base + ZSDA_ADMIN_Q_CLR_RESP,
+ ZSDA_RESP_VALID);
+
+ if (ret)
+ ZSDA_LOG(INFO, "Failed! zsda_admin q clear");
+
+ return ret;
+}
+
+
+static int
+zsda_queue_start_single(uint8_t *mmio_base, const uint8_t id)
+{
+ uint8_t *addr_start = mmio_base + ZSDA_IO_Q_START + (4 * id);
+
+ ZSDA_CSR_WRITE32(addr_start, ZSDA_Q_START);
+ return zsda_check_write(addr_start, ZSDA_Q_START);
+}
+
+
+static int
+zsda_queue_stop_single(uint8_t *mmio_base, const uint8_t id)
+{
+ int ret;
+ uint8_t *addr_stop = mmio_base + ZSDA_IO_Q_STOP + (4 * id);
+ uint8_t *addr_resp = mmio_base + ZSDA_IO_Q_STOP_RESP + (4 * id);
+
+ ZSDA_CSR_WRITE32(addr_resp, ZSDA_RESP_INVALID);
+ ZSDA_CSR_WRITE32(addr_stop, ZSDA_Q_STOP);
+
+ ret = zsda_check_write(addr_resp, ZSDA_RESP_VALID);
+ ZSDA_CSR_WRITE32(addr_resp, ZSDA_RESP_INVALID);
+
+ return ret;
+}
+
+static int
+zsda_queue_clear_single(uint8_t *mmio_base, const uint8_t id)
+{
+ int ret;
+ uint8_t *addr_clear = mmio_base + ZSDA_IO_Q_CLR + (4 * id);
+ uint8_t *addr_resp = mmio_base + ZSDA_IO_Q_CLR_RESP + (4 * id);
+
+ ZSDA_CSR_WRITE32(addr_resp, ZSDA_RESP_INVALID);
+ ZSDA_CSR_WRITE32(addr_clear, ZSDA_CLEAR_VALID);
+ ret = zsda_check_write(addr_resp, ZSDA_RESP_VALID);
+ ZSDA_CSR_WRITE32(addr_clear, ZSDA_CLEAR_INVALID);
+
+ return ret;
+}
+
+int
+zsda_queue_start(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ uint8_t id;
+ int ret = ZSDA_SUCCESS;
+
+ for (id = 0; id < zsda_num_used_qps; id++)
+ ret |= zsda_queue_start_single(mmio_base, id);
+
+ return ret;
+}
+
+int
+zsda_queue_stop(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ uint8_t id;
+ int ret = ZSDA_SUCCESS;
+
+ for (id = 0; id < zsda_num_used_qps; id++)
+ ret |= zsda_queue_stop_single(mmio_base, id);
+
+ return ret;
+}
+
+static int
+zsda_queue_clear(const struct rte_pci_device *pci_dev)
+{
+ uint8_t *mmio_base = pci_dev->mem_resource[0].addr;
+ uint8_t id;
+ int ret = ZSDA_SUCCESS;
+
+ for (id = 0; id < zsda_num_used_qps; id++)
+ ret |= zsda_queue_clear_single(mmio_base, id);
+
+ return ret;
+}
+
+int
+zsda_queue_init(struct zsda_pci_device *zsda_pci_dev)
+{
+ int ret;
+
+ zsda_num_used_qps = zsda_get_num_used_qps(zsda_pci_dev->pci_dev);
+ zsda_num_used_qps++;
+
+ ret = zsda_admin_q_start(zsda_pci_dev->pci_dev);
+ if (ret) {
+ ZSDA_LOG(ERR, "Failed! admin q start");
+ return ret;
+ }
+
+ ret = zsda_queue_clear(zsda_pci_dev->pci_dev);
+ if (ret) {
+ ZSDA_LOG(ERR, "Failed! used zsda_io q clear");
+ return ret;
+ }
+ return ret;
+}
diff --git a/drivers/common/zsda/zsda_qp.h b/drivers/common/zsda/zsda_qp.h
new file mode 100644
index 0000000000..9861606ac8
--- /dev/null
+++ b/drivers/common/zsda/zsda_qp.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 ZTE Corporation
+ */
+
+#ifndef _ZSDA_QP_H_
+#define _ZSDA_QP_H_
+
+#define ZSDA_ADMIN_Q_START 0x100
+#define ZSDA_ADMIN_Q_STOP 0x100
+#define ZSDA_ADMIN_Q_STOP_RESP 0x104
+#define ZSDA_ADMIN_Q_CLR 0x108
+#define ZSDA_ADMIN_Q_CLR_RESP 0x10C
+
+#define ZSDA_IO_Q_START 0x200
+#define ZSDA_IO_Q_STOP 0x200
+#define ZSDA_IO_Q_STOP_RESP 0x400
+#define ZSDA_IO_Q_CLR 0x600
+#define ZSDA_IO_Q_CLR_RESP 0x800
+
+#define ZSDA_Q_START 0x1
+#define ZSDA_Q_STOP 0x0
+#define ZSDA_CLEAR_VALID 0x1
+#define ZSDA_CLEAR_INVALID 0x0
+#define ZSDA_RESP_VALID 0x1
+#define ZSDA_RESP_INVALID 0x0
+
+#define ZSDA_TIME_SLEEP_US 100
+#define ZSDA_TIME_NUM 500
+
+extern struct zsda_num_qps zsda_nb_qps;
+
+int zsda_queue_start(const struct rte_pci_device *pci_dev);
+int zsda_queue_stop(const struct rte_pci_device *pci_dev);
+
+int zsda_queue_init(struct zsda_pci_device *zsda_pci_dev);
+
+#endif /* _ZSDA_QP_H_ */
diff --git a/drivers/common/zsda/zsda_qp_common.h
b/drivers/common/zsda/zsda_qp_common.h
new file mode 100644
index 0000000000..9c09a227a3
--- /dev/null
+++ b/drivers/common/zsda/zsda_qp_common.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 ZTE Corporation
+ */
+
+#ifndef _ZSDA_QP_COMMON_H_
+#define _ZSDA_QP_COMMON_H_
+
+#include <rte_io.h>
+#include <rte_cycles.h>
+#include <rte_memzone.h>
+#include <rte_malloc.h>
+#include <rte_mempool.h>
+#include <rte_mbuf.h>
+
+#include "zsda_logs.h"
+
+#define ZSDA_SUCCESS 0
+#define ZSDA_FAILED (-1)
+
+#define ZSDA_CSR_READ32(addr) rte_read32((addr))
+#define ZSDA_CSR_WRITE32(addr, value) rte_write32((value), (addr))
+#define ZSDA_CSR_READ16(addr) rte_read16((addr))
+#define ZSDA_CSR_WRITE16(addr, value) rte_write16((value), (addr))
+#define ZSDA_CSR_READ8(addr) rte_read8((addr))
+#define ZSDA_CSR_WRITE8(addr, value) rte_write8_relaxed((value), (addr))
+
+#endif /* _ZSDA_QP_COMMON_H_ */
--
2.27.0
