> From: Vipin Varghese [mailto:vipin.vargh...@amd.com] > Sent: Wednesday, 30 October 2024 06.42 > > Introduce topology aware lcore mapping into lcore API. > With higher core density, more and more cores are categorized > into various chiplets based on IO (memory and PCIe) and > Last Level Cache (mainly L3). > > Using hwloc library, the dpdk available lcores can be grouped > into various groups nameley L1, L2, L3 and IO. This patch > introduces functions and MACRO that helps to identify such > groups.
Does the API need to be prepared for L4 cache? https://www.anandtech.com/show/16924/did-ibm-just-preview-the-future-of-caches And - just a thought: Since this library and the Cache Stashing (PCIe TLP) library are somewhat related, would it be beneficial to combine them into one patch series, primarily to make their APIs more uniform?
