Thank you for the patch.
Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
> -----Original Message-----
> From: Igor Gutorov <igooto...@gmail.com>
> Sent: Wednesday, August 7, 2024 11:44 PM
> To: dev@dpdk.org
> Cc: Igor Gutorov <igooto...@gmail.com>; sta...@dpdk.org
> Subject: [PATCH v3 1/2] net/mlx5: fix reported Rx/Tx desc limits
>
> Currently, `rte_eth_dev_info.rx_desc_lim.nb_max` as well as
> `rte_eth_dev_info.tx_desc_lim.nb_max` shows 65535 as the limit, which
> results in a few problems:
>
> * It is not the actual Rx/Tx queue limit
> * Allocating an Rx queue and passing `rx_desc_lim.nb_max` results in an
> integer overflow and 0 ring size:
>
> ```
> rte_eth_rx_queue_setup(0, 0, rx_desc_lim.nb_max, 0, NULL, mb_pool); ```
>
> Which overflows ring size and generates the following log:
> ```
> mlx5_net: port 0 increased number of descriptors in Rx queue 0 to the next
> power of two (0) ``` The same holds for allocating a Tx queue.
>
> Fixes: e60fbd5b24fc ("mlx5: add device configure/start/stop")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Igor Gutorov <igooto...@gmail.com>
> ---
> drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
> drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
> drivers/net/mlx5/mlx5_ethdev.c | 4 ++++
> drivers/net/mlx5/mlx5_rxq.c | 8 ++++++++
> drivers/net/mlx5/mlx5_txq.c | 8 ++++++++
> 5 files changed, 22 insertions(+)
>
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
> b/drivers/common/mlx5/mlx5_devx_cmds.c
> index 9710dcedd3..a75f011750 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.c
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.c
> @@ -1027,6 +1027,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
> attr->log_max_qp = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp);
> attr->log_max_cq_sz = MLX5_GET(cmd_hca_cap, hcattr,
> log_max_cq_sz);
> attr->log_max_qp_sz = MLX5_GET(cmd_hca_cap, hcattr,
> log_max_qp_sz);
> + attr->log_max_wq_sz = MLX5_GET(cmd_hca_cap, hcattr,
> log_max_wq_sz);
> attr->log_max_mrw_sz = MLX5_GET(cmd_hca_cap, hcattr,
> log_max_mrw_sz);
> attr->log_max_pd = MLX5_GET(cmd_hca_cap, hcattr, log_max_pd);
> attr->log_max_srq = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq);
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
> b/drivers/common/mlx5/mlx5_devx_cmds.h
> index 6cf7999c46..2ad9e5414f 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.h
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.h
> @@ -267,6 +267,7 @@ struct mlx5_hca_attr {
> struct mlx5_hca_flow_attr flow;
> struct mlx5_hca_flex_attr flex;
> struct mlx5_hca_crypto_mmo_attr crypto_mmo;
> + uint8_t log_max_wq_sz;
> int log_max_qp_sz;
> int log_max_cq_sz;
> int log_max_qp;
> diff --git a/drivers/net/mlx5/mlx5_ethdev.c
> b/drivers/net/mlx5/mlx5_ethdev.c index 6a678d6dcc..cac55f7a72 100644
> --- a/drivers/net/mlx5/mlx5_ethdev.c
> +++ b/drivers/net/mlx5/mlx5_ethdev.c
> @@ -359,6 +359,10 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev,
> struct rte_eth_dev_info *info)
> info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
> mlx5_set_default_params(dev, info);
> mlx5_set_txlimit_params(dev, info);
> + info->rx_desc_lim.nb_max =
> + 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz;
> + info->tx_desc_lim.nb_max =
> + 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz;
> if (priv->sh->cdev->config.hca_attr.mem_rq_rmp &&
> priv->obj_ops.rxq_obj_new == devx_obj_ops.rxq_obj_new)
> info->dev_capa |= RTE_ETH_DEV_CAPA_RXQ_SHARE; diff --
> git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index
> f13fc3b353..7e171039eb 100644
> --- a/drivers/net/mlx5/mlx5_rxq.c
> +++ b/drivers/net/mlx5/mlx5_rxq.c
> @@ -655,6 +655,14 @@ mlx5_rx_queue_pre_setup(struct rte_eth_dev
> *dev, uint16_t idx, uint16_t *desc,
> struct mlx5_rxq_priv *rxq;
> bool empty;
>
> + if (*desc > 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz) {
> + DRV_LOG(ERR,
> + "port %u number of descriptors requested for Rx
> queue"
> + " %u is more than supported",
> + dev->data->port_id, idx);
> + rte_errno = EINVAL;
> + return -EINVAL;
> + }
> if (!rte_is_power_of_2(*desc)) {
> *desc = 1 << log2above(*desc);
> DRV_LOG(WARNING,
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
> index f05534e168..3e93517323 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -333,6 +333,14 @@ mlx5_tx_queue_pre_setup(struct rte_eth_dev
> *dev, uint16_t idx, uint16_t *desc) {
> struct mlx5_priv *priv = dev->data->dev_private;
>
> + if (*desc > 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz) {
> + DRV_LOG(ERR,
> + "port %u number of descriptors requested for Tx
> queue"
> + " %u is more than supported",
> + dev->data->port_id, idx);
> + rte_errno = EINVAL;
> + return -EINVAL;
> + }
> if (*desc <= MLX5_TX_COMP_THRESH) {
> DRV_LOG(WARNING,
> "port %u number of descriptors requested for Tx
> queue"
> --
> 2.45.2
