> On Thu, 3 Oct 2024 18:52:24 +0530
> <pbhagavat...@marvell.com> wrote:
> 
> > +static __rte_always_inline uint16_t
> > +cn20k_sso_hws_get_work(struct cn20k_sso_hws *ws, struct rte_event
> *ev, const uint32_t flags)
> > +{
> > +   union {
> > +           __uint128_t get_work;
> > +           uint64_t u64[2];
> > +   } gw;
> > +
> > +   gw.get_work = ws->gw_wdata;
> > +#if defined(RTE_ARCH_ARM64)
> > +#if defined(__clang__)
> > +   register uint64_t x0 __asm("x0") = (uint64_t)gw.u64[0];
> > +   register uint64_t x1 __asm("x1") = (uint64_t)gw.u64[1];
> > +#if defined(RTE_ARM_USE_WFE)
> > +   plt_write64(gw.u64[0], ws->base +
> SSOW_LF_GWS_OP_GET_WORK0);
> > +   asm volatile(PLT_CPU_FEATURE_PREAMBLE
> > +                "          ldp %[x0], %[x1], [%[tag_loc]]  \n"
> > +                "          tbz %[x0], %[pend_gw], done%=   \n"
> > +                "          sevl                                    \n"
> > +                "rty%=:    wfe                                     \n"
> > +                "          ldp %[x0], %[x1], [%[tag_loc]]  \n"
> > +                "          tbnz %[x0], %[pend_gw], rty%=   \n"
> > +                "done%=:                                           \n"
> > +                "          dmb ld                                  \n"
> > +                : [x0] "+r" (x0), [x1] "+r" (x1)
> > +                : [tag_loc] "r"(ws->base + SSOW_LF_GWS_WQE0),
> > +                  [pend_gw]
> "i"(SSOW_LF_GWS_TAG_PEND_GET_WORK_BIT)
> > +                : "memory");
> > +#else
> > +   asm volatile(".arch armv8-a+lse\n"
> > +                "caspal %[x0], %[x1], %[x0], %[x1], [%[dst]]\n"
> > +                : [x0] "+r" (x0), [x1] "+r" (x1)
> > +                : [dst] "r"(ws->base + SSOW_LF_GWS_OP_GET_WORK0)
> > +                : "memory");
> > +#endif
> > +   gw.u64[0] = x0;
> > +   gw.u64[1] = x1;
> > +#else
> > +#if defined(RTE_ARM_USE_WFE)
> > +   plt_write64(gw.u64[0], ws->base +
> SSOW_LF_GWS_OP_GET_WORK0);
> > +   asm volatile(PLT_CPU_FEATURE_PREAMBLE
> > +                "          ldp %[wdata], %H[wdata], [%[tag_loc]]   \n"
> > +                "          tbz %[wdata], %[pend_gw], done%=        \n"
> > +                "          sevl                                    \n"
> > +                "rty%=:    wfe                                     \n"
> > +                "          ldp %[wdata], %H[wdata], [%[tag_loc]]   \n"
> > +                "          tbnz %[wdata], %[pend_gw], rty%=        \n"
> > +                "done%=:                                           \n"
> > +                "          dmb ld                                  \n"
> > +                : [wdata] "=&r"(gw.get_work)
> > +                : [tag_loc] "r"(ws->base + SSOW_LF_GWS_WQE0),
> > +                  [pend_gw]
> "i"(SSOW_LF_GWS_TAG_PEND_GET_WORK_BIT)
> > +                : "memory");
> > +#else
> > +   asm volatile(PLT_CPU_FEATURE_PREAMBLE
> > +                "caspal %[wdata], %H[wdata], %[wdata], %H[wdata],
> [%[gw_loc]]\n"
> > +                : [wdata] "+r"(gw.get_work)
> > +                : [gw_loc] "r"(ws->base +
> SSOW_LF_GWS_OP_GET_WORK0)
> > +                : "memory");
> > +#endif
> > +#endif
> 
> This generates lots of warnings like:
> 
> WARNING:QUOTED_WHITESPACE_BEFORE_NEWLINE: unnecessary
> whitespace before a quoted newline
> #131: FILE: drivers/event/cnxk/cn20k_worker.h:39:
> +                  "          ldp %[x0], %[x1], [%[tag_loc]]  \n"
> 
> But the bigger problem is burying assembly in a driver is a bad idea.
> The use of ARM primitives should be done in EAL, not down in the PMD.

This sequence is very specific to the SSO co-processor in CNXK. 
I don’t think we can move it to EAL.

> 

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