From: Jun Yang <jun.y...@nxp.com>

Non-prefetchable read setting in the source descriptor may be
required for targets other than local memory. Prefetchable read
setting will offer better performance for misaligned transfers
in the form of fewer transactions and should be set if possible.
This patch also fixes QDMA stall issue due to unaligned
transactions.

Signed-off-by: Jun Yang <jun.y...@nxp.com>
Signed-off-by: Gagandeep Singh <g.si...@nxp.com>
---
 config/arm/meson.build       | 3 ++-
 doc/guides/dmadevs/dpaa.rst  | 1 +
 drivers/dma/dpaa/dpaa_qdma.c | 9 +++++++++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index e49a5f64f0..4cb5e74c72 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -489,7 +489,8 @@ soc_dpaa = {
         ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false],
         ['RTE_MAX_LCORE', 16],
         ['RTE_MAX_NUMA_NODES', 1],
-       ['RTE_DMA_DPAA_ERRATA_ERR050757', true]
+       ['RTE_DMA_DPAA_ERRATA_ERR050757', true],
+       ['RTE_DMA_DPAA_ERRATA_ERR050265', true]
     ],
     'numa': false
 }
diff --git a/doc/guides/dmadevs/dpaa.rst b/doc/guides/dmadevs/dpaa.rst
index 746919ec6b..8a7c0befc3 100644
--- a/doc/guides/dmadevs/dpaa.rst
+++ b/doc/guides/dmadevs/dpaa.rst
@@ -43,6 +43,7 @@ For builds using ``meson`` and ``ninja``, the driver will be 
built when the
 target platform is dpaa-based. No additional compilation steps are necessary.
 
 - ``RTE_DMA_DPAA_ERRATA_ERR050757`` - enable software workaround for 
Errata-A050757
+- ``RTE_DMA_DPAA_ERRATA_ERR050265`` - enable software workaround for 
Errata-A050265
 
 Initialization
 --------------
diff --git a/drivers/dma/dpaa/dpaa_qdma.c b/drivers/dma/dpaa/dpaa_qdma.c
index ffc2a73a17..6a6cfa85cc 100644
--- a/drivers/dma/dpaa/dpaa_qdma.c
+++ b/drivers/dma/dpaa/dpaa_qdma.c
@@ -167,6 +167,9 @@ fsl_qdma_pre_comp_sd_desc(struct fsl_qdma_queue *queue)
 
                /* Descriptor Buffer */
                sdf->srttype = FSL_QDMA_CMD_RWTTYPE;
+#ifdef RTE_DMA_DPAA_ERRATA_ERR050265
+               sdf->prefetch = 1;
+#endif
                ddf->dwttype = FSL_QDMA_CMD_RWTTYPE;
                ddf->lwc = FSL_QDMA_CMD_LWC;
 
@@ -711,6 +714,9 @@ fsl_qdma_enqueue_desc_single(struct fsl_qdma_queue 
*fsl_queue,
 #ifdef RTE_DMA_DPAA_ERRATA_ERR050757
        sdf = &ft->df.sdf;
        sdf->srttype = FSL_QDMA_CMD_RWTTYPE;
+#ifdef RTE_DMA_DPAA_ERRATA_ERR050265
+       sdf->prefetch = 1;
+#endif
        if (len > FSL_QDMA_CMD_SS_ERR050757_LEN) {
                sdf->ssen = 1;
                sdf->sss = FSL_QDMA_CMD_SS_ERR050757_LEN;
@@ -824,6 +830,9 @@ fsl_qdma_enqueue_desc_sg(struct fsl_qdma_queue *fsl_queue)
 #ifdef RTE_DMA_DPAA_ERRATA_ERR050757
        sdf = &ft->df.sdf;
        sdf->srttype = FSL_QDMA_CMD_RWTTYPE;
+#ifdef RTE_DMA_DPAA_ERRATA_ERR050265
+       sdf->prefetch = 1;
+#endif
        if (total_len > FSL_QDMA_CMD_SS_ERR050757_LEN) {
                sdf->ssen = 1;
                sdf->sss = FSL_QDMA_CMD_SS_ERR050757_LEN;
-- 
2.25.1

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