Making the decoder more robust by forcing a default
6 bits LLR saturation to LDPC Decoder input.

Signed-off-by: Nicolas Chautru <nicolas.chau...@intel.com>
---
 drivers/baseband/acc/rte_vrb_pmd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/baseband/acc/rte_vrb_pmd.c 
b/drivers/baseband/acc/rte_vrb_pmd.c
index 5eb3e8dd48..eb9892ff31 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -1799,6 +1799,9 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct 
acc_fcw_ld *fcw,
                fcw->hcout_offset = 0;
        }
 
+       /* Force saturation to 6 bits LLR. */
+       fcw->saturate_input = 1;
+
        fcw->tb_crc_select = 0;
        if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK))
                fcw->tb_crc_select = 2;
-- 
2.34.1

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