From: Oleksandr Kolomeiets <okl-...@napatech.com>
The TX Replacer module can replace a range of bytes in a packet.
The replacing data is stored in a table in the module
and will often contain tunnel data.
Signed-off-by: Oleksandr Kolomeiets <okl-...@napatech.com>
---
drivers/net/ntnic/meson.build | 1 +
.../nthw/flow_api/flow_backend/flow_backend.c | 13 ++++
.../ntnic/nthw/flow_filter/flow_nthw_tx_rpl.c | 78 +++++++++++++++++++
.../ntnic/nthw/flow_filter/flow_nthw_tx_rpl.h | 52 +++++++++++++
.../ntnic/nthw/supported/nthw_fpga_mod_defs.h | 1 +
.../ntnic/nthw/supported/nthw_fpga_reg_defs.h | 2 +
.../nthw/supported/nthw_fpga_reg_defs_rpl.h | 43 ++++++++++
.../supported/nthw_fpga_reg_defs_tx_rpl.h | 23 ++++++
8 files changed, 213 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.c
create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.h
create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpl.h
create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_tx_rpl.h
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 7e0900f0eb..e236b82b36 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -60,6 +60,7 @@ sources = files(
'nthw/flow_filter/flow_nthw_slc_lr.c',
'nthw/flow_filter/flow_nthw_tx_cpy.c',
'nthw/flow_filter/flow_nthw_tx_ins.c',
+ 'nthw/flow_filter/flow_nthw_tx_rpl.c',
'nthw/model/nthw_fpga_model.c',
'nthw/nthw_platform.c',
'nthw/nthw_rac.c',
diff --git a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
index 1b4c6d6b4d..f093bfb8bb 100644
--- a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
+++ b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
@@ -19,6 +19,7 @@
#include "flow_nthw_rpp_lr.h"
#include "flow_nthw_tx_cpy.h"
#include "flow_nthw_tx_ins.h"
+#include "flow_nthw_tx_rpl.h"
#include "ntnic_mod_reg.h"
#include "nthw_fpga_model.h"
#include "hw_mod_backend.h"
@@ -45,6 +46,7 @@ static struct backend_dev_s {
struct rpp_lr_nthw *p_rpp_lr_nthw; /* TPE module */
struct tx_cpy_nthw *p_tx_cpy_nthw; /* TPE module */
struct tx_ins_nthw *p_tx_ins_nthw; /* TPE module */
+ struct tx_rpl_nthw *p_tx_rpl_nthw; /* TPE module */
struct csu_nthw *p_csu_nthw; /* TPE module */
struct ifr_nthw *p_ifr_nthw; /* TPE module */
} be_devs[MAX_PHYS_ADAPTERS];
@@ -1843,6 +1845,16 @@ const struct flow_api_backend_ops
*bin_flow_backend_init(nthw_fpga_t *p_fpga, vo
be_devs[physical_adapter_no].p_tx_ins_nthw = NULL;
}
+ /* Init nthw TX_RPL */
+ if (tx_rpl_nthw_init(NULL, p_fpga, physical_adapter_no) == 0) {
+ struct tx_rpl_nthw *ptr = tx_rpl_nthw_new();
+ tx_rpl_nthw_init(ptr, p_fpga, physical_adapter_no);
+ be_devs[physical_adapter_no].p_tx_rpl_nthw = ptr;
+
+ } else {
+ be_devs[physical_adapter_no].p_tx_rpl_nthw = NULL;
+ }
+
be_devs[physical_adapter_no].adapter_no = physical_adapter_no;
*dev = (void *)&be_devs[physical_adapter_no];
@@ -1865,6 +1877,7 @@ static void bin_flow_backend_done(void *dev)
rpp_lr_nthw_delete(be_dev->p_rpp_lr_nthw);
tx_cpy_nthw_delete(be_dev->p_tx_cpy_nthw);
tx_ins_nthw_delete(be_dev->p_tx_ins_nthw);
+ tx_rpl_nthw_delete(be_dev->p_tx_rpl_nthw);
}
static const struct flow_backend_ops ops = {
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.c
b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.c
new file mode 100644
index 0000000000..65fc1a9c5e
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.c
@@ -0,0 +1,78 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "flow_nthw_tx_rpl.h"
+
+struct tx_rpl_nthw *tx_rpl_nthw_new(void)
+{
+ struct tx_rpl_nthw *p = malloc(sizeof(struct tx_rpl_nthw));
+
+ if (p)
+ (void)memset(p, 0, sizeof(*p));
+
+ return p;
+}
+
+void tx_rpl_nthw_delete(struct tx_rpl_nthw *p)
+{
+ if (p) {
+ (void)memset(p, 0, sizeof(*p));
+ free(p);
+ }
+}
+
+int tx_rpl_nthw_init(struct tx_rpl_nthw *p, nthw_fpga_t *p_fpga, int
n_instance)
+{
+ const char *const p_adapter_id_str =
p_fpga->p_fpga_info->mp_adapter_id_str;
+ nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_TX_RPL,
n_instance);
+
+ assert(n_instance >= 0 && n_instance < 256);
+
+ if (p == NULL)
+ return p_mod == NULL ? -1 : 0;
+
+ if (p_mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: TxRpl %d: no such instance\n",
p_adapter_id_str,
+ n_instance);
+ return -1;
+ }
+
+ p->mp_fpga = p_fpga;
+ p->m_physical_adapter_no = (uint8_t)n_instance;
+ p->m_tx_rpl = nthw_fpga_query_module(p_fpga, MOD_TX_RPL, n_instance);
+
+ p->mp_rcp_ctrl = nthw_module_get_register(p->m_tx_rpl, RPL_RCP_CTRL);
+ p->mp_rcp_ctrl_addr = nthw_register_get_field(p->mp_rcp_ctrl,
RPL_RCP_CTRL_ADR);
+ p->mp_rcp_ctrl_cnt = nthw_register_get_field(p->mp_rcp_ctrl,
RPL_RCP_CTRL_CNT);
+ p->mp_rcp_data = nthw_module_get_register(p->m_tx_rpl, RPL_RCP_DATA);
+ p->mp_rcp_data_dyn = nthw_register_get_field(p->mp_rcp_data,
RPL_RCP_DATA_DYN);
+ p->mp_rcp_data_ofs = nthw_register_get_field(p->mp_rcp_data,
RPL_RCP_DATA_OFS);
+ p->mp_rcp_data_len = nthw_register_get_field(p->mp_rcp_data,
RPL_RCP_DATA_LEN);
+ p->mp_rcp_data_rpl_ptr = nthw_register_get_field(p->mp_rcp_data,
RPL_RCP_DATA_RPL_PTR);
+ p->mp_rcp_data_ext_prio = nthw_register_get_field(p->mp_rcp_data,
RPL_RCP_DATA_EXT_PRIO);
+ p->mp_rcp_data_eth_type_wr =
+ nthw_register_query_field(p->mp_rcp_data,
RPL_RCP_DATA_ETH_TYPE_WR);
+
+ p->mp_ext_ctrl = nthw_module_get_register(p->m_tx_rpl, RPL_EXT_CTRL);
+ p->mp_ext_ctrl_addr = nthw_register_get_field(p->mp_ext_ctrl,
RPL_EXT_CTRL_ADR);
+ p->mp_ext_ctrl_cnt = nthw_register_get_field(p->mp_ext_ctrl,
RPL_EXT_CTRL_CNT);
+ p->mp_ext_data = nthw_module_get_register(p->m_tx_rpl, RPL_EXT_DATA);
+ p->mp_ext_data_rpl_ptr = nthw_register_get_field(p->mp_ext_data,
RPL_EXT_DATA_RPL_PTR);
+
+ p->mp_rpl_ctrl = nthw_module_get_register(p->m_tx_rpl, RPL_RPL_CTRL);
+ p->mp_rpl_ctrl_addr = nthw_register_get_field(p->mp_rpl_ctrl,
RPL_RPL_CTRL_ADR);
+ p->mp_rpl_ctrl_cnt = nthw_register_get_field(p->mp_rpl_ctrl,
RPL_RPL_CTRL_CNT);
+ p->mp_rpl_data = nthw_module_get_register(p->m_tx_rpl, RPL_RPL_DATA);
+ p->mp_rpl_data_value = nthw_register_get_field(p->mp_rpl_data,
RPL_RPL_DATA_VALUE);
+
+ return 0;
+}
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.h
b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.h
new file mode 100644
index 0000000000..7425021692
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_tx_rpl.h
@@ -0,0 +1,52 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __FLOW_NTHW_TX_RPL_H__
+#define __FLOW_NTHW_TX_RPL_H__
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct tx_rpl_nthw {
+ uint8_t m_physical_adapter_no;
+ nthw_fpga_t *mp_fpga;
+
+ nthw_module_t *m_tx_rpl;
+
+ nthw_register_t *mp_rcp_ctrl;
+ nthw_field_t *mp_rcp_ctrl_addr;
+ nthw_field_t *mp_rcp_ctrl_cnt;
+
+ nthw_register_t *mp_rcp_data;
+ nthw_field_t *mp_rcp_data_dyn;
+ nthw_field_t *mp_rcp_data_ofs;
+ nthw_field_t *mp_rcp_data_len;
+ nthw_field_t *mp_rcp_data_rpl_ptr;
+ nthw_field_t *mp_rcp_data_ext_prio;
+ nthw_field_t *mp_rcp_data_eth_type_wr;
+
+ nthw_register_t *mp_ext_ctrl;
+ nthw_field_t *mp_ext_ctrl_addr;
+ nthw_field_t *mp_ext_ctrl_cnt;
+
+ nthw_register_t *mp_ext_data;
+ nthw_field_t *mp_ext_data_rpl_ptr;
+
+ nthw_register_t *mp_rpl_ctrl;
+ nthw_field_t *mp_rpl_ctrl_addr;
+ nthw_field_t *mp_rpl_ctrl_cnt;
+
+ nthw_register_t *mp_rpl_data;
+ nthw_field_t *mp_rpl_data_value;
+};
+
+struct tx_rpl_nthw *tx_rpl_nthw_new(void);
+void tx_rpl_nthw_delete(struct tx_rpl_nthw *p);
+int tx_rpl_nthw_init(struct tx_rpl_nthw *p, nthw_fpga_t *p_fpga, int
n_instance);
+
+int tx_rpl_nthw_setup(struct tx_rpl_nthw *p, int n_idx, int n_idx_cnt);
+
+#endif /* __FLOW_NTHW_TX_RPL_H__ */
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
index 0d5385a313..51b2d99c01 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
@@ -40,6 +40,7 @@
#define MOD_SLC_LR (0x969fc50bUL)
#define MOD_TX_CPY (0x60acf217UL)
#define MOD_TX_INS (0x59afa100UL)
+#define MOD_TX_RPL (0x1095dfbbUL)
#define MOD_IDX_COUNT (14)
/* aliases - only aliases go below this point */
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
index 605196e30e..8fa41eb7ea 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
@@ -35,6 +35,7 @@
#include "nthw_fpga_reg_defs_pdb.h"
#include "nthw_fpga_reg_defs_qsl.h"
#include "nthw_fpga_reg_defs_rac.h"
+#include "nthw_fpga_reg_defs_rpl.h"
#include "nthw_fpga_reg_defs_rpp_lr.h"
#include "nthw_fpga_reg_defs_rst9563.h"
#include "nthw_fpga_reg_defs_sdc.h"
@@ -42,6 +43,7 @@
#include "nthw_fpga_reg_defs_slc_lr.h"
#include "nthw_fpga_reg_defs_tx_cpy.h"
#include "nthw_fpga_reg_defs_tx_ins.h"
+#include "nthw_fpga_reg_defs_tx_rpl.h"
/* aliases */
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpl.h
b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpl.h
new file mode 100644
index 0000000000..a163ffc45e
--- /dev/null
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpl.h
@@ -0,0 +1,43 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_rpl.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_RPL_
+#define _NTHW_FPGA_REG_DEFS_RPL_
+
+/* RPL */
+#define NTHW_MOD_RPL (0x6de535c3UL)
+#define RPL_EXT_CTRL (0x4c47804fUL)
+#define RPL_EXT_CTRL_ADR (0xe391ddadUL)
+#define RPL_EXT_CTRL_CNT (0xf399447cUL)
+#define RPL_EXT_DATA (0xe3960256UL)
+#define RPL_EXT_DATA_RPL_PTR (0xa8e4d0d9UL)
+#define RPL_RCP_CTRL (0xc471325fUL)
+#define RPL_RCP_CTRL_ADR (0x1f2d3a2bUL)
+#define RPL_RCP_CTRL_CNT (0xf25a3faUL)
+#define RPL_RCP_DATA (0x6ba0b046UL)
+#define RPL_RCP_DATA_DYN (0xe361554fUL)
+#define RPL_RCP_DATA_ETH_TYPE_WR (0xfc7f05c1UL)
+#define RPL_RCP_DATA_EXT_PRIO (0xcd2ae9d1UL)
+#define RPL_RCP_DATA_LEN (0xb0559aaUL)
+#define RPL_RCP_DATA_OFS (0x4168d8e9UL)
+#define RPL_RCP_DATA_RPL_PTR (0x3000a098UL)
+#define RPL_RPL_CTRL (0xe65376ecUL)
+#define RPL_RPL_CTRL_ADR (0x15abf987UL)
+#define RPL_RPL_CTRL_CNT (0x5a36056UL)
+#define RPL_RPL_DATA (0x4982f4f5UL)
+#define RPL_RPL_DATA_VALUE (0x60951eb4UL)
+
+#endif /* _NTHW_FPGA_REG_DEFS_RPL_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_tx_rpl.h
b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_tx_rpl.h
new file mode 100644
index 0000000000..8c46079cd5
--- /dev/null
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_tx_rpl.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_tx_rpl.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_TX_RPL_
+#define _NTHW_FPGA_REG_DEFS_TX_RPL_
+
+/* TX_RPL */
+#define NTHW_MOD_TX_RPL (0x1095dfbbUL)
+
+#endif /* _NTHW_FPGA_REG_DEFS_TX_RPL_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */
--
2.45.0
