Recheck-request: iol-marvell-Functional
On Fri, Aug 23, 2024 at 7:56 AM Soumyadeep Hore
<soumyadeep.h...@intel.com> wrote:
>
> In E830 adapters, PHY timestamp for Tx packets should be read once
> the ready status of PHY timestamp registers is 1.
>
> Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for E830")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Soumyadeep Hore <soumyadeep.h...@intel.com>
> ---
> drivers/net/ice/base/ice_ptp_hw.c | 68 ++++++++++++++++++++-----------
> 1 file changed, 44 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_ptp_hw.c
> b/drivers/net/ice/base/ice_ptp_hw.c
> index 004f659eae..41367105b2 100644
> --- a/drivers/net/ice/base/ice_ptp_hw.c
> +++ b/drivers/net/ice/base/ice_ptp_hw.c
> @@ -5526,6 +5526,27 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum
> ice_ptp_tmr_cmd cmd,
> lock_sbq);
> }
>
> +/**
> + * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
> + * @hw: pointer to the HW struct
> + * @port: the PHY port to read
> + * @tstamp_ready: contents of the Tx memory status register
> + *
> + */
> +static int
> +ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64
> *tstamp_ready)
> +{
> + u64 hi;
> + u32 lo;
> +
> + lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
> + hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
> +
> + *tstamp_ready = hi | lo;
> +
> + return 0;
> +}
> +
> /**
> * ice_read_phy_tstamp_e830 - Read a PHY timestamp out of the external PHY
> * @hw: pointer to the HW struct
> @@ -5539,10 +5560,30 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum
> ice_ptp_tmr_cmd cmd,
> static int
> ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
> {
> - u32 hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
> - u32 lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
> + u32 hi_addr, lo_addr;
> u32 lo_val, hi_val, lo;
> - u8 hi;
> + u8 hi, ret;
> + u64 start_time, curr_time;
> + u64 tstamp_ready = 0;
> +
> + start_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
> +
> + /* To check the ready status of HY Timestamp register for fetching
> timestamp */
> + while (!(tstamp_ready & BIT_ULL(0))) {
> + ret = ice_get_phy_tx_tstamp_ready_e830(hw, lport,
> &tstamp_ready);
> + if (ret) {
> + PMD_DRV_LOG(ERR, "Failed to get phy ready for
> timestamp");
> + return -1;
> + }
> + curr_time = rte_get_timer_cycles() / (rte_get_timer_hz() /
> 1000);
> + if (curr_time - start_time > 1000) {
> + PMD_DRV_LOG(ERR, "Timeout to get phy ready for
> timestamp");
> + return -1;
> + }
> + }
> +
> + hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
> + lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
>
> lo_val = rd32(hw, lo_addr);
> hi_val = rd32(hw, hi_addr);
> @@ -5558,27 +5599,6 @@ ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport,
> u8 idx, u64 *tstamp)
> return 0;
> }
>
> -/**
> - * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
> - * @hw: pointer to the HW struct
> - * @port: the PHY port to read
> - * @tstamp_ready: contents of the Tx memory status register
> - *
> - */
> -static int
> -ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64
> *tstamp_ready)
> -{
> - u64 hi;
> - u32 lo;
> -
> - lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
> - hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
> -
> - *tstamp_ready = hi | lo;
> -
> - return 0;
> -}
> -
> /* Device agnostic functions
> *
> * The following functions implement shared behavior common to both E822/E823
> --
> 2.43.0
>
