Hi Akhil, Sorry, I just noticed seems you were not added to the list by maintainer script. Can you please take a look at the series when available.
Thanks， Suanming > -----Original Message----- > From: Suanming Mou <suanmi...@nvidia.com> > Sent: Thursday, May 30, 2024 3:24 PM > Cc: dev@dpdk.org > Subject: [PATCH 0/2] crypto/mlx5: optimize AES-GCM IPsec operation > > To optimize AES-GCM IPsec operation within crypto/mlx5, the DPDK API typically > supplies AES_GCM AAD/Payload/Digest in separate locations, potentially > disrupting their contiguous layout. In cases where the memory layout fails to > meet hardware (HW) requirements, an UMR WQE is initiated ahead of the GCM's > GGA WQE to establish a continuous AAD/Payload/Digest virtual memory space > for the HW MMU. > > For IPsec scenarios, where the memory layout consistently adheres to the fixed > order of AAD/IV/Payload/Digest, directly shrinking memory for AAD proves more > efficient than preparing a UMR WQE. To address this, a new devarg > "crypto_mode" with mode "ipsec_opt" is introduced in the commit, offering an > optimization hint specifically for IPsec cases. When enabled, the PMD copies > AAD > directly before Payload in the enqueue_burst function instead of employing the > UMR WQE. Subsequently, in the dequeue_burst function, the overridden IV > before Payload is restored from the GGA WQE. It's crucial for users to avoid > utilizing the input mbuf data during processing. > > Suanming Mou (2): > crypto/mlx5: optimize AES-GCM IPsec operation > crypto/mlx5: add out of place mode for IPsec operation > > doc/guides/cryptodevs/mlx5.rst | 23 +++ > doc/guides/rel_notes/release_24_07.rst | 4 + > drivers/crypto/mlx5/mlx5_crypto.c | 22 ++- > drivers/crypto/mlx5/mlx5_crypto.h | 19 ++ > drivers/crypto/mlx5/mlx5_crypto_gcm.c | 245 > +++++++++++++++++++++++-- > 5 files changed, 292 insertions(+), 21 deletions(-) > > -- > 2.34.1
