Allow initialization functions to skip main timer programming.
Signed-off-by: Sergey Temerkhanov <sergey.temerkha...@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
---
drivers/net/ice/base/ice_ptp_hw.c | 31 ++++++++++++++++++++-----------
drivers/net/ice/base/ice_ptp_hw.h | 9 ++++++---
drivers/net/ice/ice_ethdev.c | 2 +-
3 files changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c
b/drivers/net/ice/base/ice_ptp_hw.c
index 487eb0bd92..71a03e72dd 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5806,6 +5806,7 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum
ice_ptp_tmr_cmd cmd,
* ice_ptp_init_time - Initialize device time to provided value
* @hw: pointer to HW struct
* @time: 64bits of time (GLTSYN_TIME_L and GLTSYN_TIME_H)
+ * @wr_main_tmr: program the main timer
*
* Initialize the device to the specified time provided. This requires a three
* step process:
@@ -5815,7 +5816,7 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum
ice_ptp_tmr_cmd cmd,
* 3) issue an init_time timer command to synchronously switch both the source
* and port timers to the new init time value at the next clock cycle.
*/
-int ice_ptp_init_time(struct ice_hw *hw, u64 time)
+int ice_ptp_init_time(struct ice_hw *hw, u64 time, bool wr_main_tmr)
{
int err;
u8 tmr_idx;
@@ -5827,9 +5828,11 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
if (hw->phy_model == ICE_PHY_E830)
return ice_ptp_write_direct_phc_time_e830(hw, time);
- wr32(hw, GLTSYN_SHTIME_L(tmr_idx), ICE_LO_DWORD(time));
- wr32(hw, GLTSYN_SHTIME_H(tmr_idx), ICE_HI_DWORD(time));
- wr32(hw, GLTSYN_SHTIME_0(tmr_idx), 0);
+ if (wr_main_tmr) {
+ wr32(hw, GLTSYN_SHTIME_L(tmr_idx), ICE_LO_DWORD(time));
+ wr32(hw, GLTSYN_SHTIME_H(tmr_idx), ICE_HI_DWORD(time));
+ wr32(hw, GLTSYN_SHTIME_0(tmr_idx), 0);
+ }
/* PHY Clks */
/* Fill Rx and Tx ports and send msg to PHY */
@@ -5857,8 +5860,9 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
* ice_ptp_write_incval - Program PHC with new increment value
* @hw: pointer to HW struct
* @incval: Source timer increment value per clock cycle
+ * @wr_main_tmr: Program the main timer
*
- * Program the PHC with a new increment value. This requires a three-step
+ * Program the timers with a new increment value. This requires a three-step
* process:
*
* 1) Write the increment value to the source timer shadow registers
@@ -5867,7 +5871,8 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
* the source and port timers to the new increment value at the next clock
* cycle.
*/
-int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
+int ice_ptp_write_incval(struct ice_hw *hw, u64 incval,
+ bool wr_main_tmr)
{
int err;
u8 tmr_idx;
@@ -5878,9 +5883,11 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
if (hw->phy_model == ICE_PHY_E830)
return ice_ptp_write_direct_incval_e830(hw, incval);
- /* Shadow Adjust */
- wr32(hw, GLTSYN_SHADJ_L(tmr_idx), ICE_LO_DWORD(incval));
- wr32(hw, GLTSYN_SHADJ_H(tmr_idx), ICE_HI_DWORD(incval));
+ if (wr_main_tmr) {
+ /* Shadow Adjust */
+ wr32(hw, GLTSYN_SHADJ_L(tmr_idx), ICE_LO_DWORD(incval));
+ wr32(hw, GLTSYN_SHADJ_H(tmr_idx), ICE_HI_DWORD(incval));
+ }
switch (hw->phy_model) {
case ICE_PHY_ETH56G:
@@ -5906,17 +5913,19 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
* ice_ptp_write_incval_locked - Program new incval while holding semaphore
* @hw: pointer to HW struct
* @incval: Source timer increment value per clock cycle
+ * @wr_main_tmr: Program the main timer
*
* Program a new PHC incval while holding the PTP semaphore.
*/
-int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
+int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval,
+ bool wr_main_tmr)
{
int err;
if (!ice_ptp_lock(hw))
return ICE_ERR_NOT_READY;
- err = ice_ptp_write_incval(hw, incval);
+ err = ice_ptp_write_incval(hw, incval, wr_main_tmr);
ice_ptp_unlock(hw);
diff --git a/drivers/net/ice/base/ice_ptp_hw.h
b/drivers/net/ice/base/ice_ptp_hw.h
index b0f0a9e6c6..eb30d5534f 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -142,9 +142,12 @@ u64 ice_ptp_read_src_incval(struct ice_hw *hw);
bool ice_ptp_lock(struct ice_hw *hw);
void ice_ptp_unlock(struct ice_hw *hw);
void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd);
-int ice_ptp_init_time(struct ice_hw *hw, u64 time);
-int ice_ptp_write_incval(struct ice_hw *hw, u64 incval);
-int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval);
+int ice_ptp_init_time(struct ice_hw *hw, u64 time,
+ bool wr_main_tmr);
+int ice_ptp_write_incval(struct ice_hw *hw, u64 incval,
+ bool wr_main_tmr);
+int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval,
+ bool wr_main_tmr);
int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq);
int
ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj);
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 00d5efc45e..f4394487a8 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -6438,7 +6438,7 @@ ice_timesync_enable(struct rte_eth_dev *dev)
return -1;
}
- ret = ice_ptp_write_incval(hw, ICE_PTP_NOMINAL_INCVAL_E810);
+ ret = ice_ptp_write_incval(hw, ICE_PTP_NOMINAL_INCVAL_E810,
true);
if (ret) {
PMD_DRV_LOG(ERR,
"Failed to write PHC increment time value");
--
2.43.0
