The main goal of this check is to avoid passing the -msse4.1
option to the GCC that does not support it (like arm toolchains).

The ACL now builds for ARM.

Signed-off-by: Jan Viktorin <viktorin at rehivetech.com>
---
v2 -> v3: handle missing SSE as suggested by K. Ananyev
---
 lib/librte_acl/Makefile  |  7 ++++++-
 lib/librte_acl/rte_acl.c | 19 +++++++++++++++++--
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 7a1cf8a..ed95f03 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -48,9 +48,14 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += rte_acl.c
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_bld.c
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_gen.c
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
-SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c

+CC_SSE4_1_SUPPORT := $(shell $(CC) -msse4.1 -dM -E - < /dev/null >/dev/null 
2>&1 && echo 1)
+
+ifeq ($(CC_SSE4_1_SUPPORT),1)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
+CFLAGS_rte_acl.o += -DCC_SSE41_SUPPORT
 CFLAGS_acl_run_sse.o += -msse4.1
+endif

 #
 # If the compiler supports AVX2 instructions,
diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index d60219f..e7822de 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -42,6 +42,20 @@ static struct rte_tailq_elem rte_acl_tailq = {
 EAL_REGISTER_TAILQ(rte_acl_tailq)

 /*
+ * If the compiler doesn't support SSE instructions,
+ * then the dummy one would be used instead for SSE classify method.
+ */
+int __attribute__ ((weak))
+rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
+       __rte_unused const uint8_t **data,
+       __rte_unused uint32_t *results,
+       __rte_unused uint32_t num,
+       __rte_unused uint32_t categories)
+{
+       return -ENOTSUP;
+}
+
+/*
  * If the compiler doesn't support AVX2 instructions,
  * then the dummy one would be used instead for AVX2 classify method.
  */
@@ -97,10 +111,11 @@ rte_acl_init(void)
        if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
                alg = RTE_ACL_CLASSIFY_AVX2;
        else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
-#else
+               alg = RTE_ACL_CLASSIFY_SSE;
+#elif defined (CC_SSE41_SUPPORT)
        if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
-#endif
                alg = RTE_ACL_CLASSIFY_SSE;
+#endif

        rte_acl_set_default_classify(alg);
 }
-- 
2.6.1

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