Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.
Signed-off-by: Tyler Retzlaff <roret...@linux.microsoft.com>
---
drivers/net/ionic/ionic_lif.h | 2 +-
drivers/net/ionic/ionic_rxtx.c | 6 ++----
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 591cf1a..f4a1b99 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -98,7 +98,7 @@ struct ionic_rx_qcq {
struct ionic_rx_stats stats;
/* cacheline4+ */
- struct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf
*mbs[IONIC_MBUF_BULK_ALLOC];
struct ionic_admin_ctx admin_ctx;
};
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index f0bd3ff..923f517 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -607,8 +607,7 @@
}
#define IONIC_CSUM_FLAG_MASK (IONIC_RXQ_COMP_CSUM_F_VLAN - 1)
-const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK]
- __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint64_t
ionic_csum_flags[IONIC_CSUM_FLAG_MASK] = {
/* IP_BAD set */
[IONIC_RXQ_COMP_CSUM_F_IP_BAD] = RTE_MBUF_F_RX_IP_CKSUM_BAD,
[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_TCP_OK] =
@@ -637,8 +636,7 @@
};
/* RTE_PTYPE_UNKNOWN is 0x0 */
-const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK]
- __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t
ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK] = {
[IONIC_PKT_TYPE_NON_IP] = RTE_PTYPE_UNKNOWN,
[IONIC_PKT_TYPE_IPV4] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
[IONIC_PKT_TYPE_IPV4_TCP] =
--
1.8.3.1
