Hi Honnappa,

Thanks for the review. Please see inline.

Thanks,
Anoob

> -----Original Message-----
> From: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
> Sent: Wednesday, March 6, 2024 8:50 AM
> To: Anoob Joseph <ano...@marvell.com>
> Cc: Juraj Linkeš <juraj.lin...@pantheon.tech>; tho...@monjalon.net; David
> Marchand <david.march...@redhat.com>; Jerin Jacob <jer...@marvell.com>; nd
> <n...@arm.com>; Pavan Nikhilesh Bhagavatula <pbhagavat...@marvell.com>;
> Ruifeng Wang <ruifeng.w...@arm.com>; Wathsala Wathawana Vithanage
> <wathsala.vithan...@arm.com>; dev@dpdk.org
> Subject: [EXTERNAL] Re: [PATCH v2] config/arm: add Marvell Odyssey
> 
> Prioritize security for external emails: Confirm sender and content safety 
> before
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> 
> ----------------------------------------------------------------------
> 
> 
> > On Mar 5, 2024, at 5:13 AM, Anoob Joseph <ano...@marvell.com> wrote:
> >
> > Add meson build configuration for Marvell Odyssey platform with 64-bit
> > ARM Neoverse V2 cores.
> >
> > Signed-off-by: Anoob Joseph <ano...@marvell.com>
> > ---
> >
> > Depends-on: series-31141 ("config/arm: add Neoverse V2 part number")
> >
> > Changes in v2:
> > - Renamed config file
> >
> > config/arm/arm64_odyssey_linux_gcc | 17 +++++++++++++++++
> > config/arm/meson.build             | 15 +++++++++++++++
> > 2 files changed, 32 insertions(+)
> > create mode 100644 config/arm/arm64_odyssey_linux_gcc
> >
> > diff --git a/config/arm/arm64_odyssey_linux_gcc
> > b/config/arm/arm64_odyssey_linux_gcc
> > new file mode 100644
> > index 0000000000..69b5cd42d8
> > --- /dev/null
> > +++ b/config/arm/arm64_odyssey_linux_gcc
> > @@ -0,0 +1,17 @@
> > +[binaries]
> > +c = ['ccache', 'aarch64-marvell-linux-gnu-gcc'] cpp = ['ccache',
> > +'aarch64-marvell-linux-gnu-g++'] ar =
> > +'aarch64-marvell-linux-gnu-gcc-ar'
> > +strip = 'aarch64-marvell-linux-gnu-strip'
> > +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> > +
> > +[host_machine]
> > +system = 'linux'
> > +cpu_family = 'aarch64'
> > +cpu = 'armv9-a'
> > +endian = 'little'
> > +
> > +[properties]
> > +platform = 'odyssey'
> > +
> > +[built-in options]
> 
> Just thinking out loud, given that this is a 80 core V2 machine, do we need 
> cross
> compilation support? I have the same question for Grace machine as well. I am
> thinking we should have cross compilation support only for embedded platforms.

[Anoob] DPDK binaries may not be built natively in all cases. When there are 
standard release packages with pre-built binaries, it would help in having 
cross compilation. 

> 
> 
> > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > 3886d0e2dc..94159efaa4 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -500,6 +500,20 @@ soc_n2 = {
> >     'numa': false
> > }
> >
> > +soc_odyssey = {
> > +    'description' : 'Marvell Odyssey',
> > +    'implementer' : '0x41',
> > +    'flags': [
> > +        ['RTE_MAX_LCORE', 80],
> > +        ['RTE_MAX_NUMA_NODES', 1],
> > +        ['RTE_MEMPOOL_ALIGN', 128],
> > +    ],
> > +    'part_number': '0xd4f',
> > +    'extra_march_features': ['crypto'],
> > +    'numa': false,
> > +    'sve_acle': false
> > +}
> > +
> Can you move it such that it is sorted alphabetically?

[Anoob] soc_cn9k portion is not following alphabetical order. I think it is so 
because of the renaming from soc_octeontx2 to soc_cn9k. I can push a separate 
patch to have this addressed. New addition in this patch is following 
alphabetical order. soc_odyssey is added between n2 & stingray.

> 
> > soc_cn9k = {
> >     'description': 'Marvell OCTEON 9',
> >     'implementer': '0x43',
> > @@ -617,6 +631,7 @@ socs = {
> >     'kunpeng930': soc_kunpeng930,
> >     'n1sdp': soc_n1sdp,
> >     'n2': soc_n2,
> > +    'odyssey' : soc_odyssey,
> >     'stingray': soc_stingray,
> >     'thunderx2': soc_thunderx2,
> >     'thunderxt88': soc_thunderxt88,
> > --
> > 2.25.1
> >

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