On 21/10/2015 16:42, Nikita Kalyazin wrote: > Hi, > >> This has been discussed a number of times before on list, and the consensus >> seems to be that the correct way to fix this is to introduce a set of >> specific >> barrier operations that insert the correct barrier type on each architecture, >> i.e. compiler barriers on IA, and full wmbs on architectures that require >> that. > Linux kernel contains two sets of macros: *mb() and smp_*mb(). As far as > I understand, the former are meant to order memory accesses when interacting > with peripherals (physical NICs in our case), and the latter - to provide > synchronization between CPU cores (applicable for virtual NICs in our case). > smp_*mb() for Intel architecture would be a simple compiler barrier, whereas > for processors with weaker memory model they may use real barrier > instructions. > Maybe implementing barriers similar way would work in DPDK as well? > It should work indeed. Not sure if we need two separate sets of barrier functions, the smb_*mb() might work on their own (certainly for IA, they should do - not sure for other architectures), but I think the general consensus, based on previous discussions, is that this is the direction we want to go in for these barrier issues.
/Bruce
