On Thu, Dec 7, 2023 at 2:03 PM <pbhagavat...@marvell.com> wrote: > > From: Pavan Nikhilesh <pbhagavat...@marvell.com> > > Optimize Rx routine to use AVX2 instructions when underlying > architecture supports it. > > Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com> > --- > doc/guides/rel_notes/release_24_03.rst | 5 + > drivers/net/octeon_ep/cnxk_ep_rx_avx.c | 123 +++++++++++++++++++++++++ > drivers/net/octeon_ep/meson.build | 12 +++ > drivers/net/octeon_ep/otx_ep_ethdev.c | 10 ++ > drivers/net/octeon_ep/otx_ep_rxtx.h | 6 ++ > 5 files changed, 156 insertions(+) > create mode 100644 drivers/net/octeon_ep/cnxk_ep_rx_avx.c > > diff --git a/doc/guides/rel_notes/release_24_03.rst > b/doc/guides/rel_notes/release_24_03.rst > index 6f8ad27808..2191dd78e7 100644 > --- a/doc/guides/rel_notes/release_24_03.rst > +++ b/doc/guides/rel_notes/release_24_03.rst > @@ -55,6 +55,11 @@ New Features > Also, make sure to start the actual text at the margin. > ======================================================= > > +* **Updated Marvell Octeon ep driver.** > + > + * Added SSE/AVX2 Rx routines. > + * Updated Tx queue thresholds. Please add little more info in Tx queue one.
Also, Split doc changes to respective patches.
