Hi John, Thanks for your reply. > -----Original Message----- > From: Mcnamara, John [mailto:john.mcnamara at intel.com] > AFAIK, timestamping of every packet isn't supported by ixgbe/i40e nics and I > don't know about non-Intel nics. It was supported for some(?) igb nics and > hence the patch you linked to. Also, there isn't any DPDK API to > enable/disable it even if it is supported by the nic.
What a pity, that's a bad news for me. Another question in case you know: AFAIUI ixgbe/i40e devices receive packets in burst/sequences. What's the timeout for flushing the receive queue? In other words, if I send a single packet to the PHY of the NIC, after how much time will the Intel network controller will stop waiting for further packets (to put in the same "burst") and send that single packet to the CPU? Thanks, Francesco
