On 9/19/23 20:24, Hernan Vargas wrote:
Some constraints are imposed onto the ACC100 HARQ input size,
but that value is incorrectly aligned down when getting close to
max (Ncb-F) which is not required.
The wireless performance impact is negligeable but still causes a
few LLRs no to be combined at the very end of the circular buffer.
Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
Cc: sta...@dpdk.org
Signed-off-by: Hernan Vargas <hernan.var...@intel.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c
b/drivers/baseband/acc/rte_acc100_pmd.c
index 5362d39c302f..c736f3e4201c 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1218,7 +1218,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct
acc_fcw_ld *fcw,
- op->ldpc_dec.n_filler);
/* Alignment on next 64B - Already enforced from HC output */
- harq_in_length = RTE_ALIGN_FLOOR(harq_in_length,
ACC_HARQ_ALIGN_64B);
+ harq_in_length = RTE_ALIGN_CEIL(harq_in_length,
ACC_HARQ_ALIGN_64B);
/* Stronger alignment requirement when in decompression mode */
if (fcw->hcin_decomp_mode > 0)
Applied to next-baseband/for-main.
Thanks,
Maxime
