> -----Original Message-----
> From: Su, Simei <simei...@intel.com>
> Sent: Friday, August 25, 2023 3:21 PM
> To: Wu, Jingjing <jingjing...@intel.com>; Xing, Beilei
> <beilei.x...@intel.com>;
> Zhang, Qi Z <qi.z.zh...@intel.com>
> Cc: dev@dpdk.org; Wu, Wenjun1 <wenjun1...@intel.com>; Su, Simei
> <simei...@intel.com>
> Subject: [PATCH] common/idpf: rework single queue Tx function
>
> This patch replaces flex Tx descriptor structure with base Tx descriptor.
>
> Signed-off-by: Simei Su <simei...@intel.com>
> ---
> drivers/common/idpf/idpf_common_rxtx.c | 72 +++++++++++++------
> drivers/common/idpf/idpf_common_rxtx.h | 2 +-
> drivers/common/idpf/idpf_common_rxtx_avx512.c | 36 +++++-----
> drivers/net/idpf/idpf_rxtx.c | 2 +-
> 4 files changed, 69 insertions(+), 43 deletions(-)
>
> diff --git a/drivers/common/idpf/idpf_common_rxtx.c
> b/drivers/common/idpf/idpf_common_rxtx.c
> index fc87e3e243..67c124a614 100644
> --- a/drivers/common/idpf/idpf_common_rxtx.c
> +++ b/drivers/common/idpf/idpf_common_rxtx.c
> @@ -276,14 +276,14 @@ idpf_qc_single_tx_queue_reset(struct
> idpf_tx_queue *txq)
> }
>
> txe = txq->sw_ring;
> - size = sizeof(struct idpf_flex_tx_desc) * txq->nb_tx_desc;
> + size = sizeof(struct idpf_base_tx_desc) * txq->nb_tx_desc;
> for (i = 0; i < size; i++)
> ((volatile char *)txq->tx_ring)[i] = 0;
>
> prev = (uint16_t)(txq->nb_tx_desc - 1);
> for (i = 0; i < txq->nb_tx_desc; i++) {
> - txq->tx_ring[i].qw1.cmd_dtype =
> -
> rte_cpu_to_le_16(IDPF_TX_DESC_DTYPE_DESC_DONE);
> + txq->tx_ring[i].qw1 =
> +
> rte_cpu_to_le_64(IDPF_TX_DESC_DTYPE_DESC_DONE);
> txe[i].mbuf = NULL;
> txe[i].last_id = i;
> txe[prev].next_id = i;
> @@ -823,6 +823,33 @@ idpf_calc_context_desc(uint64_t flags)
> return 0;
> }
>
> +/* set TSO context descriptor for single queue */ static inline void
> +idpf_set_singleq_tso_ctx(struct rte_mbuf *mbuf,
> + union idpf_tx_offload tx_offload,
> + volatile struct idpf_base_tx_ctx_desc *ctx_desc) {
> + uint16_t cmd_dtype;
> + uint32_t tso_len;
> + uint8_t hdr_len;
> +
> + if (tx_offload.l4_len == 0) {
> + TX_LOG(DEBUG, "L4 length set to 0");
> + return;
> + }
> +
> + hdr_len = tx_offload.l2_len +
> + tx_offload.l3_len +
> + tx_offload.l4_len;
> + cmd_dtype = IDPF_TX_CTX_DESC_TSO;
The cmd_dtype for base mode context TSO descriptor should be
cmd_dtype = IDPF_TX_DESC_DTYPE_CTX | IDPF_TX_CTX_DESC_TSO << IDPF_TXD_QW1_CMD_S;
> + tso_len = mbuf->pkt_len - hdr_len;
> +
> + ctx_desc->qw1 |= ((uint64_t)cmd_dtype <<
> IDPF_TXD_CTX_QW1_CMD_S) |
> + ((uint64_t)tso_len << IDPF_TXD_CTX_QW1_TSO_LEN_S) |
> + ((uint64_t)mbuf->tso_segsz <<
> IDPF_TXD_CTX_QW1_MSS_S); }
It seems better to add mask & here to avoid crossing.
>...
Regards,
Wenjun
