On Fri, Aug 11, 2023 at 2:31 PM Nithin Dabilpuram
<ndabilpu...@marvell.com> wrote:
>
> From: Rahul Bhansali <rbhans...@marvell.com>
>
> In reassembly path, next header field in IPv6 header is not
> updated correctly, hence reassembled packet is corrupted.
> This fix will consider IPv6 fragment header presence at start/mid/end in
> extension list and update the next header field accordingly.
>
> Fixes: ec28231ed260 ("net/cnxk: support reassembly of multi-segment packets")
>
> Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
Adding following changeset with cc: sta...@dpdk.org
Is it candidate for Cc: sta...@dpdk.org backport?
common/cnxk: fixes CGX promisc toggling
common/cnxk: fix xstats for different packet sizes
common/cnxk: fix leak in error path
common/cnxk: fix different size bit operations
common/cnxk: fix different size bit operations
common/cnxk: fix BP threshold calculation
common/cnxk: fix incorrect aura ID
net/cnxk: fix CQ allocation
net/cnxk: fix issue with GCC 4.8
net/cnxk: fix uninitialized variable
net/cnxk: fix usage of mbuf rearm data
net/cnxk: fix uninitialized variable
net/cnxk: fixes for IPv6 header in reassembly
Updated the git commit as follows and applied to
dpdk-next-net-mrvl/for-next-net. Thanks
commit 2c71d37506009777af406615d43fc421fd1412cc
Author: Rahul Bhansali <rbhans...@marvell.com>
Date: Fri Aug 11 14:28:05 2023 +0530
net/cnxk: fix IPv6 header reassembly
In reassembly path, next header field in IPv6 header is not
updated correctly, hence reassembled packet is corrupted.
This fix will consider IPv6 fragment header presence at start/mid/end in
extension list and update the next header field accordingly.
Fixes: ec28231ed260 ("net/cnxk: support reassembly of
multi-segment packets")
Cc: sta...@dpdk.org
Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
commit d2c7aa15b84246740beec23d68aa1351e5517a17
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:28:04 2023 +0530
net/cnxk: add flag check for extension header when used
send_hdr_ext is being used, but it may be null when
the flag check for NIX_TX_NEED_EXT_HDR is not done.
Hence added a check here to avoid null pointer dereference.
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit 0e6b7f09b3e11f487828c475b9d8286f970a74f1
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:28:03 2023 +0530
net/cnxk: check returned value for null
nix_mtr_find may return NULL in case MTR is not found.
Hence checking the return value before using it.
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit 15f6a30bbfb4d884fceb15d42f7cca579067ddca
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:28:02 2023 +0530
net/cnxk: fix uninitialized variable
Shift may be uninitialized in certain case, initialize it.
Fixes: 55bfac717c72 ("net/cnxk: support Tx security offload on cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit 031272db4a44e0f398a91bd36e605f3e1e675a9f
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:28:01 2023 +0530
net/cnxk: fix usage of mbuf rearm data
mbuf->rearm_data is a zero length array and it is being
used to set data from that location.
This shows an error in static code analysis.
Hence it is typecast to a pointer which can be used to
set values accordingly.
Fixes: c062f5726f61 ("net/cnxk: support IP reassembly")
Cc: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit db0e6258355d047575ede320fcf839ad7d4cc6ba
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:28:00 2023 +0530
net/cnxk: fix uninitialized variable
sa_base may be uninitialized in for cases. Initialize it.
Fixes: 4382a7ccf781 ("net/cnxk: support Rx security offload on cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit c4c50edebc3c2cd5f5d35810cfba5d913ad5df68
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:27:59 2023 +0530
net/cnxk: update different size bit operations
Certain bitwise operations are done with different
sized operands which causes warnings in static code
analysis. The necessary operands are typecast to remove
the warning.
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit c950b013afeca04d17d9eb8206acac783376eae1
Author: Srujana Challa <scha...@marvell.com>
Date: Fri Aug 11 14:27:58 2023 +0530
net/cnxk: move MAC address set from init to configure
Channel(rx_chan_base) is not available in the kernel at
the time of nix probe. Hence, move the mac address set
call from nix_device_init() to nix_device_configure().
This fixes the issue on cn10kb, where traffic was not
getting received when promiscuous is disabled.
Signed-off-by: Srujana Challa <scha...@marvell.com>
commit 07f39d45590eed229696993760c937243a91206a
Author: Satha Rao <skotesh...@marvell.com>
Date: Fri Aug 11 14:27:57 2023 +0530
net/cnxk: support rate limit in PFC TM tree
SQ rate limit was different in PFC tree compared to regular rate
limit tree.
Signed-off-by: Satha Rao <skotesh...@marvell.com>
commit dfeceb66ade867d212c70a18524aca33f94bd5d6
Author: Sunil Kumar Kori <sk...@marvell.com>
Date: Fri Aug 11 14:27:56 2023 +0530
net/cnxk: add mapping of DMAC address indexes
Add support to map DMAC address indexes during
mac address add and remove operation.
Signed-off-by: Sunil Kumar Kori <sk...@marvell.com>
commit df58fc9ed25ddc3efb1be37f0765215a245bbef0
Author: Nithin Dabilpuram <ndabilpu...@marvell.com>
Date: Fri Aug 11 14:27:55 2023 +0530
net/cnxk: fix issue with GCC 4.8
Fix issue with GCC 4.8 cross compilation of ARM64 for
flexible vector conversions.
Fixes: ec28231ed260 ("net/cnxk: support reassembly of
multi-segment packets")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpu...@marvell.com>
commit ad06e4384ef706638f872521656cd81fbcf8519a
Author: Satha Rao <skotesh...@marvell.com>
Date: Fri Aug 11 14:27:54 2023 +0530
net/cnxk: fix CQ allocation
Allocate number of CQs sufficient to handle completions of both
RQs and SQs.
Fixes: dd9446991212 ("net/cnxk: add transmit completion handler")
Cc: sta...@dpdk.org
Signed-off-by: Satha Rao <skotesh...@marvell.com>
commit 69194137a3e2649ffcafc0ea5760cda5dde758cf
Author: Pavan Nikhilesh <pbhagavat...@marvell.com>
Date: Fri Aug 11 14:27:53 2023 +0530
common/cnxk: fix incorrect aura ID
The function `sso_hwgrp_alloc_xaq` expects aura ID, fix incorrectly
passing aura handle to it.
Fixes: 7e9a94909eea ("common/cnxk: realloc inline device XAQ AURA")
Cc: sta...@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com>
commit 2b2d3faa8d5c4a7d91e72feb9c750bb0baab43fc
Author: Kommula Shiva Shankar <kshan...@marvell.com>
Date: Fri Aug 11 14:27:52 2023 +0530
common/cnxk: enable CQ stashing
This patch enables CQ stashing for better CQE
processing performance
Signed-off-by: Kommula Shiva Shankar <kshan...@marvell.com>
commit ce99eb272ca6e958c6f4022f754c8df7ed165844
Author: Sunil Kumar Kori <sk...@marvell.com>
Date: Fri Aug 11 14:27:51 2023 +0530
common/cnxk: expose different params for BP config
Currently same bp percentage is applied on SPB and
LPB pool but both pools can be configured with different
BP level.
Added one more parameter so that separate threshold parameters
can be passed for SPB and LPB pools.
Signed-off-by: Sunil Kumar Kori <sk...@marvell.com>
commit 042d4df880469031412d43c037a769c577b22953
Author: Sunil Kumar Kori <sk...@marvell.com>
Date: Fri Aug 11 14:27:50 2023 +0530
common/cnxk: allow same TC on multiple RQs
To achieve actual PFC behavior, user needs to configure
different TC on different aura so that PFC can be generated
for specific TC but same TC can also configured on multiple
RQs which has same configured aura.
In this patch, aura with same BP configuration is allowed
on multiple RQs.
Signed-off-by: Sunil Kumar Kori <sk...@marvell.com>
commit 2a14586dd1dd22c76393a1c7070a781b79b3b5a8
Author: Sunil Kumar Kori <sk...@marvell.com>
Date: Fri Aug 11 14:27:49 2023 +0530
common/cnxk: fix BP threshold calculation
Current macro to calculate BP threshold were evaluating incorrect
threshold because aura_limit is first shifted by shift then
percentage is calculated.
While first percentage should be calculated and the resultant should be
shifted by shift. So formula is updated accordingly.
Fixes: cb4bfd6e7bdf ("event/cnxk: support Rx adapter")
Cc: sta...@dpdk.org
Signed-off-by: Sunil Kumar Kori <sk...@marvell.com>
commit c6f86d4d378a502e43ce876e09dc849d95a7bfb8
Author: Rahul Bhansali <rbhans...@marvell.com>
Date: Fri Aug 11 14:27:48 2023 +0530
common/cnxk: add API to get Rx chan count from NIX
For SDP, provide an API to get Rx chan count from NIX as
all channels are always active.
Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
commit 8a9e44c11e8ac61a84bf5c1cb089ab29383e5936
Author: Srujana Challa <scha...@marvell.com>
Date: Fri Aug 11 14:27:47 2023 +0530
common/cnxk: sync MAC addr set mailbox structure
Sync MAC address set mailbox format with kernel. And
send match table index to the kernel to add the
mac address. This fixes the issues on cn10kb, where
traffic was not received when promiscuous is disabled
and two ports are used.
Signed-off-by: Srujana Challa <scha...@marvell.com>
commit ef88cbdf31cab8c0f384e8b46cd6f1630b4bbe9a
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:27:46 2023 +0530
common/cnxk: remove unnecessary ROC API calls
Removed the calls to roc_nix_num_rx[tx]_xstats which
does a model check again for cn9k/cn10k.
The model check is already done before the call in the
same leg, hence not needed to call these APIs.
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit bdda357d9fc106ec5fba1e527d5abc9903ab295f
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:27:45 2023 +0530
common/cnxk: fix different size bit operations
Bitwise or is being done on relchan which is 32 bit,
but the result is 64 bit, hence typecast to uint64_t.
Fixes: 8f867a87b9c5 ("common/cnxk: enable SDP channel backpressure to TL4")
Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
CC: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit b28fbdb946c6c8dfeca3a3ee1122397726036c64
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:27:44 2023 +0530
common/cnxk: fix different size bit operations
WORD_SIZE is made as unsigned long long so that
bit operations are done on same size of variables.
Fixes: 1ec23c7523b4 ("common/cnxk: support anti-replay check in SW
for cn9k")
CC: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit fe2f65a00d573cb38bb729777bb54ada5d0113cf
Author: Akhil Goyal <gak...@marvell.com>
Date: Fri Aug 11 14:27:43 2023 +0530
common/cnxk: fix leak in error path
Fixed resource leak when pthread create fails in dev_init().
Fixes: 1c7a4d37e73d ("common/cnxk: fix mailbox timeout due to deadlock")
CC: sta...@dpdk.org
Signed-off-by: Akhil Goyal <gak...@marvell.com>
commit 2b82385bab1142036b61169be1d5c07c29bb8d81
Author: Satha Rao <skotesh...@marvell.com>
Date: Fri Aug 11 14:27:42 2023 +0530
common/cnxk: disable BP on SDP link while closing SQ
Host SDP port closes the SDP link on NIX causes crash when
BP enabled on SDP link. This patch disables BP on SDP link
when SQ flush fails due to link disabled at host.
Signed-off-by: Satha Rao <skotesh...@marvell.com>
commit 5307971ae312eeaa7bd062205e5f5a954f437f29
Author: Rakesh Kudurumalla <rkuduruma...@marvell.com>
Date: Fri Aug 11 14:27:41 2023 +0530
common/cnxk: fix xstats for different packet sizes
xstats for transmitted packets with different sizes
are not updated as sizeof mailbox response structure
are different in DPDK and kernel. This patch fixes the
same.
Fixes: 503b82de2cbf ("common/cnxk: add mbox request and response
definitions")
CC: sta...@dpdk.org
Signed-off-by: Rakesh Kudurumalla <rkuduruma...@marvell.com>
commit 72aeb217bf6ee71e53755bc6d3f2c123a3d70826
Author: Rahul Bhansali <rbhans...@marvell.com>
Date: Fri Aug 11 14:27:40 2023 +0530
common/cnxk: fix CGX promiscuous toggling
Allow CGX promiscuous toggling even when exact match feature is enabled.
Also, In case of exact feature, CGX promiscuous enable/disable mailbox
response returns failure code -1101 in case if no change in the state.
This failure code can be ignored and proceed further.
Fixes: a90649722b51 ("common/cnxk: skip CGX promisc mode with NPC
exact match")
CC: sta...@dpdk.org
Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
commit f12b398c331ff011a8f51937338832f8f30d8e47
Author: Satha Rao <skotesh...@marvell.com>
Date: Fri Aug 11 14:27:39 2023 +0530
common/cnxk: support rate limit on PFC TM tree
New SQ rate limit API to support SQ rate limit on PFC tree.
In PFC tree each SQ had its one to one mapped TL3, this patch
configures shaper rate on TL3. Also configures the TL2 with
link rate.
Signed-off-by: Satha Rao <skotesh...@marvell.com>
commit dc82880872e17950c118d61b6055fd4d02caf8bd
Author: Nithin Dabilpuram <ndabilpu...@marvell.com>
Date: Fri Aug 11 14:27:38 2023 +0530
common/cnxk: add workaround for CPT ctx fetch issue
Add workaround for CPT context fetch issue in CN10KB
by setting CTX_ILEN to that of CTX_SIZE and enabling
FLR_FLUSH in CPT_LF_CTX_CTL.
Signed-off-by: Nithin Dabilpuram <ndabilpu...@marvell.com>
commit fcb9f3e796c5481ff63464d2c039925337c89de6
Author: Satha Rao <skotesh...@marvell.com>
Date: Fri Aug 11 14:27:37 2023 +0530
common/cnxk: use only user SQB slack when provided
This patch preferred user provided argument while configuring slack.
If no platform argument given then by default MAX(24, 30% of SQ size)
was configured as slack. Currently even if user provided SQB slack,
it take max of internally calculated value and user given one.
Signed-off-by: Satha Rao <skotesh...@marvell.com>
commit 01949e68299f1bc1fea53704cf1bdcdea7c7d478
Author: Rakesh Kudurumalla <rkuduruma...@marvell.com>
Date: Fri Aug 11 14:27:36 2023 +0530
common/cnxk: optimize FC configure time on VF
PFC configuration function is taking 8 ms due
to mailbox communication to check whether SSO is
connected to RQ and whether back pressure is enabled
on each AURA. To optimize this time, updating AURA
attributes in nixlf and sso_ena parameter in RQ during
write configuration and the same updated value is
accessed while configuring flow control, reducing time to 6 ms.
Signed-off-by: Rakesh Kudurumalla <rkuduruma...@marvell.com>
commit c010ea427d1d1566784066750b27821bafc6b9fe
Author: Sunil Kumar Kori <sk...@marvell.com>
Date: Fri Aug 11 14:27:35 2023 +0530
common/cnxk: add aura reference count mechanism
Each RQ can be associated with lpb_aura and spb_aura.
lpb_aura or spb_aura is shared across multiple RQs then
cleanup via one RQ will reset the aura context.
To prevent, adding reference count mechanism.
Signed-off-by: Sunil Kumar Kori <sk...@marvell.com>
