Hi,
> -----Original Message-----
> From: Bing Zhao <bi...@nvidia.com>
> Sent: Friday, June 30, 2023 3:58 PM
> To: Matan Azrad <ma...@nvidia.com>; Slava Ovsiienko
> <viachesl...@nvidia.com>; Ori Kam <or...@nvidia.com>; Suanming Mou
> <suanmi...@nvidia.com>; Raslan Darawsheh <rasl...@nvidia.com>
> Cc: dev@dpdk.org; Jack Min <jack...@nvidia.com>; sta...@dpdk.org
> Subject: [PATCH] net/mlx5: reduce the counter pool name length
>
> The name size of a rte_ring is RTE_MEMZONE_NAMESIZE with the value 32
> by default. When creating a HWS counter pool cache, the final string
> format was "RG_MLX5_HWS_CNT_POOL_%u_cache/%u" and it could support
> less than 1000 variants. For example, if the first %u representing
> port id is 100 and it will take all the available characters then the
> second %u for queues will be discarded. If there was more than one
> rule creation queue, the rte_ring could not be created.
>
> By reducing the fixed character number and using hexadecimal format,
> the issue can be overcome with an assumption that not all the integer
> fields for queue index is used.
>
> Fixes: 13ea6bdcc7ee ("net/mlx5: support counters in cross port shared
> mode")
> Fixes: 4d368e1da3a4 ("net/mlx5: support flow counter action for HWS")
> Cc: jack...@nvidia.com
> Cc: sta...@dpdk.org
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
