Hi,
> -----Original Message-----
> From: Ruifeng Wang <ruifeng.w...@arm.com>
> Sent: Tuesday, May 30, 2023 8:48 AM
> To: Raslan Darawsheh <rasl...@nvidia.com>; Matan Azrad
> <ma...@nvidia.com>; Slava Ovsiienko <viachesl...@nvidia.com>
> Cc: dev@dpdk.org; honnappa.nagaraha...@arm.com; sta...@dpdk.org;
> n...@arm.com; Ruifeng Wang <ruifeng.w...@arm.com>; Ali Alnubani
> <alia...@nvidia.com>
> Subject: [PATCH v2] net/mlx5: fix risk in Rx descriptor read in NEON vector
> path
>
> In NEON vector PMD, vector load loads two contiguous 8B of
> descriptor data into vector register. Given vector load ensures no
> 16B atomicity, read of the word that includes op_own field could be
> reordered after read of other words. In this case, some words could
> contain invalid data.
>
> Reloaded qword0 after read barrier to update vector register. This
> ensures that the fetched data is correct.
>
> Testpmd single core test on N1SDP/ThunderX2 showed no performance drop.
>
> Fixes: 1742c2d9fab0 ("net/mlx5: fix synchronization on polling Rx
> completions")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Ruifeng Wang <ruifeng.w...@arm.com>
> Tested-by: Ali Alnubani <alia...@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
> ---
> v2: Rebased and added tags that received.
>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
