vfio-pci driver in Linux kernel 6.2 enables PASID by default. In DLB hardware, enabling PASID puts DLB in SIOV mode. This breaks DLB PF-PMD mode. For DLB PF-PMD mode to function properly PASID needs to be disabled for kernel 6.2.
In this commit this issue is addressed and PASID is disabled by writing a zero to PASID control register. Signed-off-by: Abdullah Sevincer <abdullah.sevin...@intel.com> --- drivers/event/dlb2/pf/dlb2_main.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c index 717aa4fc08..63868e2388 100644 --- a/drivers/event/dlb2/pf/dlb2_main.c +++ b/drivers/event/dlb2/pf/dlb2_main.c @@ -46,6 +46,7 @@ #define DLB2_PCI_CAP_ID_MSIX 0x11 #define DLB2_PCI_EXT_CAP_ID_PRI 0x13 #define DLB2_PCI_EXT_CAP_ID_ACS 0xD +#define DLB2_PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */ #define DLB2_PCI_PRI_CTRL_ENABLE 0x1 #define DLB2_PCI_PRI_ALLOC_REQ 0xC @@ -64,6 +65,8 @@ #define DLB2_PCI_ACS_CR 0x8 #define DLB2_PCI_ACS_UF 0x10 #define DLB2_PCI_ACS_EC 0x20 +#define DLB2_PCI_PASID_CTRL 0x06 /* PASID control register */ +#define DLB2_PCI_PASID_CAP_OFFSET 0x148 /* PASID capability offset */ static int dlb2_pci_find_capability(struct rte_pci_device *pdev, uint32_t id) { @@ -257,12 +260,14 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) uint16_t rt_ctl_word; uint32_t pri_reqs_dword; uint16_t pri_ctrl_word; + uint16_t pasid_ctrl; int pcie_cap_offset; int pri_cap_offset; int msix_cap_offset; int err_cap_offset; int acs_cap_offset; + int pasid_cap_offset; int wait_count; uint16_t devsta_busy_word; @@ -582,6 +587,28 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) } } + /* The current Linux kernel vfio driver does not expose PASID capability to + * users. It also enables PASID by default, which breaks DLB PF PMD. We have + * to use the hardcoded offset for now to disable PASID. + */ + pasid_cap_offset = DLB2_PCI_PASID_CAP_OFFSET; + + off = pasid_cap_offset + DLB2_PCI_PASID_CTRL; + if (rte_pci_read_config(pdev, &pasid_ctrl, 2, off) != 2) + pasid_ctrl = 0; + + if (pasid_ctrl) { + DLB2_INFO(dlb2_dev, "DLB2 disabling pasid...\n"); + + pasid_ctrl = 0; + ret = rte_pci_write_config(pdev, &pasid_ctrl, 2, off); + if (ret != 2) { + DLB2_LOG_ERR("[%s()] failed to write the pcie config space at offset %d\n", + __func__, (int)off); + return ret; + } + } + return 0; } -- 2.25.1