> On Tue, 23 May 2023 20:09:20 +0530 > <pbhagavat...@marvell.com> wrote: > > > From: Pavan Nikhilesh <pbhagavat...@marvell.com> > > > > Improve reassembly lookup performance by using NEON intrinsics for > > key validation. > > > > Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com> > > --- > > lib/ip_frag/ip_frag_internal.c | 224 +++++++++++++++++++++++++------ > > lib/ip_frag/ip_reassembly.h | 6 + > > lib/ip_frag/rte_ip_frag_common.c | 10 ++ > > 3 files changed, 196 insertions(+), 44 deletions(-) > > > Using a function pointer for the lookup has some downsides. > On Intel an indirect call is slower especially with SPECTRE mitigations. >
The patch doesn't use direct function pointers, it stores the function id and switches between them. Function ID scheme doesn't break primary/secondary process scheme even with ASLR scheme. > The bigger issue is that indirect call will break usage from primary/secondary > process with ASLR. If primary sets up table and secondary uses it the function > will be in different places. I will be dropping this patch since the performance improvement with NEON is negligible, there is lot of bucket state that we unfortunately don't cache with the current implementation.
