> -----Original Message-----
> From: Xu, Ke1 <ke1...@intel.com>
> Sent: Friday, May 26, 2023 6:16 PM
> To: Ye, MingjinX <mingjinx...@intel.com>; dev@dpdk.org
> Cc: Yang, Qiming <qiming.y...@intel.com>; Zhou, YidingX
> <yidingx.z...@intel.com>; Ye, MingjinX <mingjinx...@intel.com>; Zhang, Qi
> Z <qi.z.zh...@intel.com>
> Subject: RE: [PATCH v2] net/ice: support double vlan
>
> > From: Mingjin Ye <mingjinx...@intel.com>
> > Sent: Saturday, May 6, 2023 6:05 PM
> > To: dev@dpdk.org
> > Cc: Yang, Qiming <qiming.y...@intel.com>; Zhou, YidingX
> > <yidingx.z...@intel.com>; Ye, MingjinX <mingjinx...@intel.com>; Zhang,
> > Qi Z <qi.z.zh...@intel.com>
> > Subject: [PATCH v2] net/ice: support double vlan
> >
> > Aligned with kernel driver, optimized for inner and outer VLAN
> > handling in DPDK, and implemented double vlan insertion and stripping
> support.
> > NIC must work in double vlan mode(DVM), depending on FW/SW.
> >
> > 1. Adjust vlan stripping
> > The vlan stripping enable/disable is applied to the inner vlan.
> >
> > 2. Support QinQ stripping
> > The ice outer vlan strip is enabled/disabled by the mask bit of
> > `RTE_ETH_RX_OFFLOAD_QINQ_STRIP`, and the user can use "vlan set
> > qinq_strip on 0" to enable or "vlan setqinq_strip off 0" to disable
> > the ice outer vlan strip in testpmd.
> >
> > 3. Support outer tag type switching
> > Implement the ethdev `vlan_tpid_set` api to enable outer tag support
> > to handle `RTE_ETHER_TYPE_VLAN`` RTE_ETHER_TYPE_QINQ``
> > RTE_ETHER_TYPE_QINQ1` outer tag types.
> >
> > 4. Support outer port-based vlan insertion Implement port-based outer
> > vlan insertion. User can use "tx_vlan set pvid 0 45 on" to enable or
> > "tx_vlan set pvid 0
> > 45 off" to disable the outer vlan insertion in testpmd.
> >
> > Signed-off-by: Mingjin Ye <mingjinx...@intel.com>
>
> Tested and passed.
>
> There are several points need to be mentioned.
> 1. Only Scalar path is implemented, needs force-max-simd-bitwidth.
> 2. Not supported: StripQ.
> 3. Hardware limitation: Requires different outer and inner VLAN type. It
> means
> setting outer TPID to 0x88a8 before double VLAN insert.
> 4. Undefined behaviour: VLAN insert and TPID configured together is not
> defined
> in this new feature. TPID is designed to work with PVID now. Under this
> implementation
> changing TPID would not change the TX outer VLAN type of double VLAN
> insert.
>
> Tested-by: Ke Xu <ke1...@intel.com>
Acked-by: Qi Zhang <qi.z.zh...@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
