This patch adds querying the HCA capabilities for maximum supported
pattern length for Header Modify Pattern objects.

Signed-off-by: Dariusz Sosnowski <dsosnow...@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 14 ++++++++++++++
 drivers/common/mlx5/mlx5_devx_cmds.h |  2 ++
 drivers/common/mlx5/mlx5_prm.h       |  3 ++-
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c 
b/drivers/common/mlx5/mlx5_devx_cmds.c
index d0907fcd49..95d86d9573 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1086,6 +1086,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
                        flow_counter_access_aso);
        attr->flow_access_aso_opc_mod = MLX5_GET(cmd_hca_cap, hcattr,
                        flow_access_aso_opc_mod);
+       attr->wqe_based_flow_table_sup = MLX5_GET(cmd_hca_cap, hcattr,
+                       wqe_based_flow_table_update_cap);
        /*
         * Flex item support needs max_num_prog_sample_field
         * from the Capabilities 2 table for PARSE_GRAPH_NODE
@@ -1293,6 +1295,18 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
        attr->rss_ind_tbl_cap = MLX5_GET
                                        (per_protocol_networking_offload_caps,
                                         hcattr, rss_ind_tbl_cap);
+       if (attr->wqe_based_flow_table_sup) {
+               hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
+                               MLX5_GET_HCA_CAP_OP_MOD_WQE_BASED_FLOW_TABLE |
+                               MLX5_HCA_CAP_OPMOD_GET_CUR);
+               if (!hcattr) {
+                       DRV_LOG(DEBUG, "Failed to query WQE Based Flow table 
capabilities");
+                       return rc;
+               }
+               attr->max_header_modify_pattern_length = 
MLX5_GET(wqe_based_flow_table_cap,
+                                                                 hcattr,
+                                                                 
max_header_modify_pattern_length);
+       }
        /* Query HCA attribute for ROCE. */
        if (attr->roce) {
                hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h 
b/drivers/common/mlx5/mlx5_devx_cmds.h
index ce173bc36a..410ada31b8 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -299,6 +299,8 @@ struct mlx5_hca_attr {
        uint32_t flow_access_aso_opc_mod:8;
        uint32_t cross_vhca:1;
        uint32_t lag_rx_port_affinity:1;
+       uint32_t wqe_based_flow_table_sup:1;
+       uint8_t max_header_modify_pattern_length;
 };
 
 /* LAG Context. */
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index ed3d5efbb7..8cf9316589 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2289,7 +2289,8 @@ struct mlx5_ifc_wqe_based_flow_table_cap_bits {
        u8 rtc_index_mode[0x5];
        u8 reserved_at_58[0x3];
        u8 rtc_log_depth_max[0x5];
-       u8 reserved_at_60[0x10];
+       u8 reserved_at_60[0x8];
+       u8 max_header_modify_pattern_length[0x8];
        u8 ste_format[0x10];
        u8 stc_action_type[0x80];
        u8 header_insert_type[0x10];
-- 
2.25.1

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