This commit adds hash mode 2 to the Intel QuickAssist Technology symmetric crypto PMD.
Signed-off-by: Arek Kusztal <arkadiuszx.kusz...@intel.com> --- drivers/common/qat/qat_adf/icp_qat_fw_la.h | 10 ++++++++++ drivers/crypto/qat/qat_sym_session.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_la.h b/drivers/common/qat/qat_adf/icp_qat_fw_la.h index c4901eb869..fe57d8e488 100644 --- a/drivers/common/qat/qat_adf/icp_qat_fw_la.h +++ b/drivers/common/qat/qat_adf/icp_qat_fw_la.h @@ -80,6 +80,10 @@ struct icp_qat_fw_la_bulk_req { #define ICP_QAT_FW_LA_PARTIAL_END 2 #define QAT_LA_PARTIAL_BITPOS 0 #define QAT_LA_PARTIAL_MASK 0x3 +#define QAT_FW_LA_MODE2_BITPOS 5 +#define QAT_FW_LA_MODE2 1 +#define QAT_FW_LA_NO_MODE2 0 +#define QAT_FW_LA_MODE2_MASK 0x1 #define ICP_QAT_FW_LA_FLAGS_BUILD(zuc_proto, gcm_iv_len, auth_rslt, proto, \ cmp_auth, ret_auth, update_state, \ ciph_iv, ciphcfg, partial) \ @@ -187,6 +191,12 @@ struct icp_qat_fw_la_bulk_req { QAT_FIELD_SET(flags, val, QAT_LA_PARTIAL_BITPOS, \ QAT_LA_PARTIAL_MASK) +#define ICP_QAT_FW_HASH_FLAG_MODE2_SET(flags, val) \ + QAT_FIELD_SET(flags, \ + val, \ + QAT_FW_LA_MODE2_BITPOS, \ + QAT_FW_LA_MODE2_MASK) + struct icp_qat_fw_cipher_req_hdr_cd_pars { union { struct { diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h index 6322d7e3bc..d487bca11f 100644 --- a/drivers/crypto/qat/qat_sym_session.h +++ b/drivers/crypto/qat/qat_sym_session.h @@ -47,6 +47,7 @@ ICP_QAT_HW_CIPHER_DECRYPT) #define QAT_AES_CMAC_CONST_RB 0x87 +#define QAT_PREFIX_TABLE_SZ 128 #define QAT_CRYPTO_SLICE_SPC 1 #define QAT_CRYPTO_SLICE_UCS 2 @@ -77,6 +78,7 @@ typedef int (*qat_sym_build_request_t)(void *in_op, struct qat_sym_session *ctx, struct qat_sym_cd { struct icp_qat_hw_cipher_algo_blk cipher; struct icp_qat_hw_auth_algo_blk hash; + uint8_t prefix_state[QAT_PREFIX_TABLE_SZ] __rte_cache_aligned; } __rte_packed __rte_cache_aligned; struct qat_sym_session { -- 2.25.1